/haiku-buildtools/binutils/opcodes/ |
H A D | z8k-opc.h | 291 unsigned char opcode; member in struct:__anon1159
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H A D | xstormy16-opc.c | 1 /* Instruction opcode table for xstormy16. 1013 /* The macro instruction opcode table. */ 1128 This plugs the opcode entries and macro instructions into the cpu table. */ 1147 insns[i].opcode = &oc[i]; 1158 insns[i].opcode = &oc[i];
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H A D | xc16x-opc.c | 1 /* Instruction opcode table for xc16x. 2919 /* The macro instruction opcode table. */ 3004 This plugs the opcode entries and macro instructions into the cpu table. */ 3023 insns[i].opcode = &oc[i]; 3034 insns[i].opcode = &oc[i];
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H A D | visium-dis.c | 24 #include "opcode/visium.h" 86 int opcode = (ins >> 21) & 0x000f; local 91 switch (opcode) 107 /* Illegal opcode. */ 111 /* Illegal opcode. */ 115 /* Illegal opcode. */ 119 /* Illegal opcode. */ 123 /* Illegal opcode. */ 127 /* Illegal opcode. */ 131 /* Illegal opcode 178 int opcode = (ins >> 21) & 0xf; local 433 int opcode = (ins >> 21) & 0xf; local 530 int opcode = (ins >> 21) & 0xf; local [all...] |
H A D | vax-dis.c | 25 #include "opcode/vax.h" 333 invalid operand was found, or -2 if an opcode tabel error was 407 the last opcode might be a single byte with no argument data. */ 451 vax_opcodeT opcode = votp->detail.code; local 454 if ((bfd_byte) opcode == buffer[0] 455 && (opcode >> 8 == 0 || opcode >> 8 == buffer[1]))
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H A D | v850-dis.c | 25 #include "opcode/v850.h" 264 /* Find the opcode. */ 267 if ((op->mask & insn) == op->opcode 306 fprintf (stderr, "match: insn: %lx, mask: %lx, opcode: %lx, name: %s\n", 307 insn, op->mask, op->opcode, op->name ); 400 && ( op->opcode == 0x00e407e0 /* clr1 */ 401 || op->opcode == 0x00e207e0 /* not1 */ 402 || op->opcode == 0x00e007e0 /* set1 */ 403 || op->opcode == 0x00e607e0 /* tst1 */
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H A D | tilepro-opc.c | 1 /* TILEPro opcode information. 33 #include <asm/opcode-tile.h> 36 #include "opcode/tilepro.h" 10211 d->opcode = opc;
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H A D | tilepro-dis.c | 28 #include "opcode/tilepro.h" 57 const struct tilepro_opcode *opcode = decoded[i].opcode; local 59 if (opcode->mnemonic != expected_mnemonic) 70 *last_operand_ret = decoded[i].operand_values[opcode->num_operands - 1]; 108 /* Determine which nop opcode is used for padding and should be skipped. */ 112 if (!decoded[i].opcode->can_bundle) 123 const struct tilepro_opcode *opcode = decoded[i].opcode; local 129 if (opcode [all...] |
H A D | tilegx-opc.c | 1 /* TILE-Gx opcode information. 33 #include <asm/opcode-tile_64.h> 36 #include "opcode/tilegx.h" 8092 d->opcode = opc;
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H A D | tilegx-dis.c | 28 #include "opcode/tilegx.h" 61 /* Determine which nop opcode is used for padding and should be skipped. */ 65 if (!decoded[i].opcode->can_bundle) 76 const struct tilegx_opcode *opcode = decoded[i].opcode; local 82 if (opcode->mnemonic == padding_mnemonic 90 name = opcode->name; 95 for (j = 0; j < opcode->num_operands; j++)
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H A D | tic80-dis.c | 23 #include "opcode/tic80.h" 188 /* We have chosen an opcode table entry. */ 194 const struct tic80_opcode *opcode) 202 (*info->fprintf_func) (info->stream, "%-10s", opcode->name); 204 for (opindex = opcode->operands; *opindex != 0; opindex++) 233 if (opindex != opcode->operands) 255 instruction opcode contains one or two instructions. However since 268 const struct tic80_opcode *opcode; 271 /* Find the first opcode match in the opcodes table. For vector 278 for (opcode 187 print_one_instruction(struct disassemble_info *info, bfd_vma memaddr, unsigned long insn, const struct tic80_opcode *opcode) argument 263 const struct tic80_opcode *opcode; local [all...] |
H A D | tic6x-dis.c | 25 #include "opcode/tic6x.h" 33 #include "opcode/tic6x-insn-formats.h" 48 #include "opcode/tic6x-control-registers.h" 52 /* Define the opcode table. */ 103 #include "opcode/tic6x-opcode-table.h" 145 tic6x_field_bits (unsigned int opcode, const tic6x_insn_field *field) argument 151 return (opcode >> field->bitfields[0].low_pos) & ((1u << field->bitfields[0].width) - 1); 154 val |= ((opcode >> field->bitfields[i].low_pos) & ((1u << field->bitfields[i].width) - 1)) 243 unsigned int opcode; local [all...] |
H A D | tic54x-dis.c | 27 #include "opcode/tic54x.h" 52 unsigned short opcode; local 63 opcode = bfd_getl16 (opbuf); 64 tm = tic54x_get_insn (info, memaddr, opcode, &size); 73 if (!print_parallel_instruction (info, memaddr, opcode, tm, size)) 78 if (!print_instruction (info, memaddr, opcode, 110 if (tm->opcode == (memdata & tm->mask)) 115 /* if lk addressing is used, the second half of the opcode gets 140 if (tm->opcode == (memdata & tm->mask)) 172 unsigned short opcode, 170 print_instruction(disassemble_info *info, bfd_vma memaddr, unsigned short opcode, const char *tm_name, const enum optype tm_operands[], int size, int ext) argument 470 print_parallel_instruction(disassemble_info *info, bfd_vma memaddr, unsigned short opcode, const insn_template *ptm, int size) argument 498 sprint_indirect_address(disassemble_info *info ATTRIBUTE_UNUSED, char buf[], unsigned short opcode) argument 520 sprint_direct_address(disassemble_info *info ATTRIBUTE_UNUSED, char buf[], unsigned short opcode) argument 548 sprint_cc2(disassemble_info *info ATTRIBUTE_UNUSED, char *buf, unsigned short opcode) argument 560 sprint_condition(disassemble_info *info ATTRIBUTE_UNUSED, char *buf, unsigned short opcode) argument [all...] |
H A D | tic4x-dis.c | 28 #include "opcode/tic4x.h" 169 unsigned long opcode) 171 return tic4x_print_addr (info, pc + offset + tic4x_pc_offset (opcode)); 420 p->opcode); 517 p->opcode); 613 && optable_special[i]->opcode == inst->opcode) 623 /* Add the new opcode. */ 643 int opcode = inst->opcode >> (3 local 166 tic4x_print_relative(struct disassemble_info *info, unsigned long pc, long offset, unsigned long opcode) argument [all...] |
H A D | tic30-dis.c | 26 #include "opcode/tic30.h" 200 if ((fragment & 0x1F) == current_reg->opcode)
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H A D | spu-dis.c | 25 #include "opcode/spu.h" 40 /* If two instructions have the same opcode then we prefer the first 44 int o = spu_opcodes[i].opcode; 57 unsigned int opcode = insn >> (32-11); local 59 /* Init the table. This assumes that element 0/opcode 0 (currently 64 if ((op_index = spu_disassemble_table[opcode & 0x780]) != 0 68 if ((op_index = spu_disassemble_table[opcode & 0x7f0]) != 0 72 if ((op_index = spu_disassemble_table[opcode & 0x7f8]) != 0 76 if ((op_index = spu_disassemble_table[opcode & 0x7fc]) != 0 80 if ((op_index = spu_disassemble_table[opcode [all...] |
H A D | sparc-opc.c | 28 #include "opcode/sparc.h" 114 /* Table of opcode architectures. 115 The order is defined in opcode/sparc.h. */ 235 #define COMMUTEOP(opcode, op3, arch_mask) \ 236 { opcode, F3(2, op3, 0), F3(~2, ~op3, ~0)|ASI(~0), "1,2,d", 0, 0, 0, arch_mask }, \ 237 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "1,i,d", 0, 0, 0, arch_mask }, \ 238 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "i,1,d", 0, 0, 0, arch_mask } 275 /* The v9 LDUW is the same as the old 'ld' opcode, it is not the same as the 394 /* Note that the LDTXA instructions share an opcode with the 1287 #define br(opcode, mas [all...] |
H A D | sparc-dis.c | 23 #include "opcode/sparc.h" 42 /* The sorted opcode table. */ 50 opcode table is hashed. OPCODE_BITS is a table of valid bits for each 58 const sparc_opcode *opcode; member in struct:sparc_opcode_hash 196 /* Nonzero if INSN is the opcode for a delayed branch. */ 205 const sparc_opcode *opcode = op->opcode; local 207 if ((opcode->match & insn) == opcode->match 208 && (opcode 544 const sparc_opcode *opcode = op->opcode; local [all...] |
H A D | s390-mkopc.c | 1 /* s390-mkopc.c -- Generates opcode table out of s390-opc.txt 25 #include "opcode/s390.h" 29 char opcode[16]; member in struct:op_struct 52 /* `insertOpcode': insert an op_struct into sorted opcode array. */ 55 insertOpcode (char *opcode, char *mnemonic, char *format, argument 70 str = opcode; 93 strcpy(op_array[ix].opcode, opcode); 154 /* As with insertOpcode instructions are added to the sorted opcode 161 insertExpandedMnemonic (char *opcode, cha argument 323 char opcode[16]; local [all...] |
H A D | s390-dis.c | 27 #include "opcode/s390.h" 34 /* Set up index table for first opcode byte. */ 47 opc_index[s390_opcodes[i].opcode[0]] = i; 85 const struct s390_opcode *opcode) 87 return (buffer[1] & opcode->mask[1]) == opcode->opcode[1] 88 && (buffer[2] & opcode->mask[2]) == opcode->opcode[ 84 s390_insn_matches_opcode(const bfd_byte *buffer, const struct s390_opcode *opcode) argument 167 s390_print_insn_with_opcode(bfd_vma memaddr, struct disassemble_info *info, const bfd_byte *buffer, const struct s390_opcode *opcode) argument 265 const struct s390_opcode *opcode = NULL; local [all...] |
H A D | rx-dis.c | 28 #include "opcode/rx.h" 109 RX_Opcode_Decoded opcode; local 123 rv = rx_decode_opcode (addr, &opcode, rx_get_byte, &rx_data); 132 if (opcode.op[0].size == RX_Bad_Size 133 || register_names [opcode.op[0].reg] == NULL 134 || register_names [opcode.op[1].reg] == NULL 135 || register_names [opcode.op[2].reg] == NULL) 148 for (s = opcode.syntax; *s; s++) 186 PR (PS, "%s", opsize_names[opcode.size]); 192 oper = opcode [all...] |
H A D | rl78-dis.c | 29 #include "opcode/rl78.h" 106 RL78_Opcode_Decoded opcode; local 123 rv = rl78_decode_opcode (addr, &opcode, rl78_get_byte, &rl78_data, isa); 131 s = opcode.syntax; 135 switch (opcode.id) 163 sprintf(buf, "%s%%W%%f\t\033[32m%s\033[0m", s, opcode.syntax); 222 if (opcode.size == RL78_Word) 227 if (opcode.flags) 232 if (opcode.flags & RL78_PSW_Z) 234 if (opcode [all...] |
H A D | ppc-dis.c | 28 #include "opcode/ppc.h" 372 /* Calculate opcode table indices to speed up disassembly, 387 unsigned op = PPC_OP (powerpc_opcodes[i].opcode); 403 unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask); 500 /* Find a match for INSN in the opcode table, given machine DIALECT. 501 A DIALECT of -1 is special, matching all machine opcode variations. */ 506 const struct powerpc_opcode *opcode; local 510 /* Get the major opcode of the instruction. */ 513 /* Find the first match in the opcode table for this major opcode 551 const struct powerpc_opcode *opcode; local 611 const struct powerpc_opcode *opcode; local [all...] |
H A D | pj-dis.c | 24 #include "opcode/pj.h" 48 unsigned char opcode; local 51 if ((status = info->read_memory_func (addr, &opcode, 1, info))) 54 if (opcode == 0xff) 60 fprintf_fn (stream, "%s\t", pj_opc_info[opcode + byte_2].u.name); 67 const pj_opc_info_t *op = &pj_opc_info[opcode];
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H A D | pdp11-dis.c | 23 #include "opcode/pdp11.h" 195 int opcode; local 203 if (read_word (memaddr, &opcode, info) != 0) 207 src = (opcode >> 6) & 0x3f; 208 dst = opcode & 0x3f; 213 if ((opcode & OP.mask) == OP.opcode) 260 int ac = (opcode & 0xe0) >> 6; 271 int ac = (opcode & 0xe0) >> 6; 282 int ac = (opcode [all...] |