Searched refs:ocsc_mode (Results 1 - 9 of 9) sorted by relevance
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_mpc.c | 135 enum mpc_output_csc_mode ocsc_mode) 141 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) { 142 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); 160 ocsc_mode = MPC_OUTPUT_CSC_COEF_A; 162 ocsc_mode = MPC_OUTPUT_CSC_COEF_B; 169 if (ocsc_mode == MPC_OUTPUT_CSC_COEF_A) { 182 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); 189 enum mpc_output_csc_mode ocsc_mode) 197 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) { 198 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); 131 mpc2_set_output_csc( struct mpc *mpc, int opp_id, const uint16_t *regval, enum mpc_output_csc_mode ocsc_mode) argument 185 mpc2_set_ocsc_default( struct mpc *mpc, int opp_id, enum dc_color_space color_space, enum mpc_output_csc_mode ocsc_mode) argument [all...] |
H A D | dcn20_mpc.h | 296 enum mpc_output_csc_mode ocsc_mode); 302 enum mpc_output_csc_mode ocsc_mode);
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/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | mpc.h | 480 enum mpc_output_csc_mode ocsc_mode); 485 enum mpc_output_csc_mode ocsc_mode);
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/linux-master/drivers/gpu/drm/amd/display/dc/core/ |
H A D | dc_hw_sequencer.c | 677 block_sequence[*num_steps].params.set_output_csc_params.ocsc_mode = MPC_OUTPUT_CSC_COEF_A; 684 block_sequence[*num_steps].params.set_ocsc_default_params.ocsc_mode = MPC_OUTPUT_CSC_COEF_A; 873 enum mpc_output_csc_mode ocsc_mode = params->set_output_csc_params.ocsc_mode; local 879 ocsc_mode); 887 enum mpc_output_csc_mode ocsc_mode = params->set_ocsc_default_params.ocsc_mode; local 893 ocsc_mode);
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/linux-master/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
H A D | dcn10_dpp_cm.c | 256 uint32_t ocsc_mode; local 276 ocsc_mode = 4; 278 ocsc_mode = 5; 286 if (ocsc_mode == 4) { 303 REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode);
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_mpc.c | 1290 enum mpc_output_csc_mode ocsc_mode) 1297 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); 1299 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) 1312 if (ocsc_mode == MPC_OUTPUT_CSC_COEF_A) { 1329 enum mpc_output_csc_mode ocsc_mode) 1338 REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode); 1339 if (ocsc_mode == MPC_OUTPUT_CSC_DISABLE) 1355 if (ocsc_mode == MPC_OUTPUT_CSC_COEF_A) { 1286 mpc3_set_output_csc( struct mpc *mpc, int opp_id, const uint16_t *regval, enum mpc_output_csc_mode ocsc_mode) argument 1325 mpc3_set_ocsc_default( struct mpc *mpc, int opp_id, enum dc_color_space color_space, enum mpc_output_csc_mode ocsc_mode) argument
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H A D | dcn30_mpc.h | 1044 enum mpc_output_csc_mode ocsc_mode); 1050 enum mpc_output_csc_mode ocsc_mode);
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/ |
H A D | hw_sequencer.h | 128 enum mpc_output_csc_mode ocsc_mode; member in struct:set_output_csc_params 135 enum mpc_output_csc_mode ocsc_mode; member in struct:set_ocsc_default_params
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
H A D | dcn20_hwseq.c | 988 enum mpc_output_csc_mode ocsc_mode = MPC_OUTPUT_CSC_COEF_A; local 999 ocsc_mode); 1005 ocsc_mode);
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