Searched refs:mux_uart5_p (Results 1 - 2 of 2) sorted by path

/linux-master/drivers/clk/rockchip/
H A Dclk-px30.c167 PNAME(mux_uart5_p) = { "clk_uart5_src", "clk_uart5_np5", "clk_uart5_frac" }; variable
245 MUX(0, "clk_uart5_mux", mux_uart5_p, CLK_SET_RATE_PARENT,
H A Dclk-rv1126.c166 PNAME(mux_uart5_p) = { "sclk_uart5_div", "sclk_uart5_frac", "xin24m" }; variable
240 MUX(SCLK_UART5_MUX, "sclk_uart5_mux", mux_uart5_p, CLK_SET_RATE_PARENT,

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