Searched refs:mul (Results 1 - 25 of 104) sorted by relevance

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/linux-master/drivers/clk/tegra/
H A Dclk-utils.c16 int mul; local
21 mul = 1 << frac_width;
24 divider_ux1 *= mul;
32 divider_ux1 *= mul;
34 if (divider_ux1 < mul)
37 divider_ux1 -= mul;
H A Dclk-divider.c40 int div, mul; local
51 mul = get_mul(divider);
52 div += mul;
54 rate *= mul;
65 int div, mul; local
75 mul = get_mul(divider);
77 return DIV_ROUND_UP(output_rate * mul, div + mul);
H A Dclk-periph-fixed.c57 rate = (unsigned long long)parent_rate * fixed->mul;
74 unsigned int mul,
99 fixed->mul = mul;
70 tegra_clk_register_periph_fixed(const char *name, const char *parent, unsigned long flags, void __iomem *base, unsigned int mul, unsigned int div, unsigned int num) argument
/linux-master/drivers/gpu/drm/tegra/
H A Dhda.c14 unsigned int mul, div, bits, channels; local
26 mul = (format & AC_FMT_MULT_MASK) >> AC_FMT_MULT_SHIFT;
29 fmt->sample_rate *= (mul + 1) / (div + 1);
/linux-master/arch/arm/lib/
H A Dmuldi3.S28 mul xh, yl, xh
35 mul yh, xl, yh
36 mul xl, yl, xl
37 mul ip, yl, ip
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_afmt.c54 unsigned long div, mul; local
70 mul = ((128*freq/1000) + (n-1))/n;
72 n *= mul;
73 cts *= mul;
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dcommon.h39 #define ATH_EP_MUL(x, mul) ((x) * (mul))
47 #define ATH_EP_RND(x, mul) \
48 (((x) + ((mul)/2)) / (mul))
/linux-master/drivers/clk/actions/
H A Dowl-factor.c28 unsigned int val, unsigned int *mul, unsigned int *div)
34 *mul = clkt->mul;
51 calc_rate = parent_rate * clkt->mul;
85 try_parent_rate = rate * clkt->div / clkt->mul;
89 __func__, clkt->val, clkt->mul, clkt->div,
102 cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul;
125 unsigned int val, mul = 0, div = 1; local
128 _get_table_div_mul(clkt, val, &mul, &div);
130 return *parent_rate * mul / di
27 _get_table_div_mul(const struct clk_factor_table *table, unsigned int val, unsigned int *mul, unsigned int *div) argument
149 u32 reg, val, mul, div; local
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H A Dowl-pll.c20 u32 mul; local
22 mul = DIV_ROUND_CLOSEST(rate, pll_hw->bfreq);
23 if (mul < pll_hw->min_mul)
24 mul = pll_hw->min_mul;
25 else if (mul > pll_hw->max_mul)
26 mul = pll_hw->max_mul;
28 return mul & mul_mask(pll_hw);
65 u32 mul; local
76 mul = owl_pll_calculate_mul(pll_hw, rate);
78 return pll_hw->bfreq * mul;
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/linux-master/drivers/clk/
H A Dclk-vt8500.c455 u32 mul; local
464 for (mul = 0; mul <= 255; mul++) {
465 tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2));
472 *multiplier = mul;
480 *multiplier = mul;
503 u32 mul; local
512 for (mul = 0; mul <
550 u32 filter, mul, div1, div2; local
601 u32 filter, mul, div1, div2; local
[all...]
H A Dclk-moxart.c21 unsigned int mul; local
34 mul = readl(base + 0x30) >> 3 & 0x3f;
43 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1);
H A Dclk-cdce706.c73 unsigned mul; member in struct:cdce706_hw_data
169 "%s, pll: %d, mux: %d, mul: %u, div: %u\n",
170 __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div);
173 if (hwd->div && hwd->mul) {
174 u64 res = (u64)parent_rate * hwd->mul;
190 unsigned long mul, div; local
199 &mul, &div);
200 hwd->mul = mul;
204 "%s, pll: %d, mul
216 unsigned long mul = hwd->mul, div = hwd->div; local
297 unsigned long mul, div; local
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/linux-master/arch/nios2/
H A DMakefile28 KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_HW_MUL_SUPPORT),-mhw-mul,-mno-hw-mul)
/linux-master/lib/crypto/mpi/
H A DMakefile25 mpi-mul.o \
28 mpih-mul.o \
/linux-master/arch/x86/include/asm/
H A Ddiv64.h87 static inline u64 mul_u64_u64_div_u64(u64 a, u64 mul, u64 div) argument
92 : "a" (a), "rm" (mul), "rm" (div)
99 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 div) argument
101 return mul_u64_u64_div_u64(a, mul, div);
/linux-master/include/linux/
H A Dmath64.h164 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) argument
166 return (u64)(((unsigned __int128)a * mul) >> shift);
171 static __always_inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) argument
173 return (u64)(((unsigned __int128)a * mul) >> shift);
180 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) argument
188 ret = mul_u32_u32(al, mul) >> shift;
190 ret += mul_u32_u32(ah, mul) << (32 - shift);
261 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 divisor) argument
275 rl.ll = mul_u32_u32(u.l.low, mul);
276 rh.ll = mul_u32_u32(u.l.high, mul)
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/linux-master/drivers/cpufreq/
H A Dcpufreq-nforce2.c25 #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div)
69 unsigned char mul, div; local
71 mul = (pll >> 8) & 0xff;
75 return NFORCE2_XTAL * mul / div;
89 unsigned char mul = 0, div = 0; local
93 while (((mul == 0) || (div == 0)) && (tried <= 3)) {
98 mul = xmul;
104 if ((mul == 0) || (div == 0))
107 return NFORCE2_PLL(mul, di
[all...]
/linux-master/drivers/gpu/drm/i915/
H A Di915_fixed.h75 static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) argument
79 tmp = mul_u32_u32(val, mul.val);
87 uint_fixed_16_16_t mul)
91 tmp = mul_u32_u32(val.val, mul.val);
118 static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) argument
122 tmp = mul_u32_u32(val, mul.val);
86 mul_fixed16(uint_fixed_16_16_t val, uint_fixed_16_16_t mul) argument
/linux-master/drivers/clk/imgtec/
H A Dclk-boston.c34 uint mmcmdiv, mul, cpu_div, sys_div; local
53 mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
56 sys_freq = mult_frac(in_freq, mul, sys_div);
59 cpu_freq = mult_frac(in_freq, mul, cpu_div);
/linux-master/drivers/clk/at91/
H A Dclk-pll.c40 u16 mul; member in struct:clk_pll
69 u16 mul; local
73 mul = PLL_MUL(pllr, layout);
77 (div == pll->div && mul == pll->mul))
90 ((pll->mul & layout->mul_mask) << layout->mul_shift));
118 if (!pll->div || !pll->mul)
121 return (parent_rate / pll->div) * (pll->mul + 1);
126 u32 *div, u32 *mul,
226 if (mul)
124 clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, unsigned long parent_rate, u32 *div, u32 *mul, u32 *index) argument
249 u32 mul; local
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/linux-master/arch/openrisc/
H A DMakefile31 KBUILD_CFLAGS += $(call cc-option,-mhard-mul)
33 KBUILD_CFLAGS += $(call cc-option,-msoft-mul)
/linux-master/arch/m68k/fpsp040/
H A Dbinstr.S16 | bit 63. The fraction is multiplied by 10 using a mul by 2
17 | shift and a mul by 8 shift. The bits shifted out of the
51 | d2: upper 32-bits of fraction for mul by 8
52 | d3: lower 32-bits of fraction for mul by 8
53 | d4: upper 32-bits of fraction for mul by 2
54 | d5: lower 32-bits of fraction for mul by 2
97 asll #1,%d5 |mul d5 by 2
98 roxll #1,%d4 |mul d4 by 2
100 addxw %d6,%d1 |add in extend from mul by 2
102 | A5. Add mul b
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/linux-master/arch/sh/lib/
H A Ddiv64.S29 mul.l r6, r2
/linux-master/arch/arm/boot/compressed/
H A Dll_char_wr.S66 mul r7, r2, r7
71 mul r7, r2, r7
85 mul r4, r2, ip
88 mul ip, r2, ip @ avoid r4
95 mul r4, r2, ip
98 mul ip, r2, ip @ avoid r4
/linux-master/drivers/pwm/
H A Dpwm-img.c93 unsigned long mul, output_clk_hz, input_clk_hz; local
107 mul = DIV_ROUND_UP(input_clk_hz, output_clk_hz);
108 if (mul <= max_timebase) {
110 timebase = DIV_ROUND_UP(mul, 1);
111 } else if (mul <= max_timebase * 8) {
113 timebase = DIV_ROUND_UP(mul, 8);
114 } else if (mul <= max_timebase * 64) {
116 timebase = DIV_ROUND_UP(mul, 64);
117 } else if (mul <= max_timebase * 512) {
119 timebase = DIV_ROUND_UP(mul, 51
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