/linux-master/arch/parisc/kernel/ |
H A D | head.S | 76 mtctl %r10,%cr11 115 mtctl %r4,%cr24 /* Initialize kernel root pointer */ 116 mtctl %r4,%cr25 /* Initialize user root pointer */ 168 mtctl %r6,%cr30 269 mtctl %r6,%cr30 /* restore task thread info */ 289 mtctl %r0,%cr8 290 mtctl %r0,%cr9 291 mtctl %r0,%cr12 292 mtctl %r0,%cr13 305 mtctl [all...] |
H A D | real2.S | 107 # define POP_CR(r, where) LDREG,mb -REG_SZ(where), %r1 ! mtctl %r1, r 157 mtctl %r0, %cr17 /* Clear IIASQ tail */ 158 mtctl %r0, %cr17 /* Clear IIASQ head */ 159 mtctl %r1, %cr18 /* IIAOQ head */ 161 mtctl %r1, %cr18 /* IIAOQ tail */ 163 mtctl %r1, %cr22 194 mtctl %r0, %cr17 /* Clear IIASQ tail */ 195 mtctl %r0, %cr17 /* Clear IIASQ head */ 196 mtctl %r1, %cr18 /* IIAOQ head */ 198 mtctl [all...] |
H A D | relocate_kernel.S | 62 mtctl %r0, %cr17 /* IIASQ */ 63 mtctl %r0, %cr17 /* IIASQ */ 64 mtctl %r1, %cr18 /* IIAOQ */ 66 mtctl %r1, %cr18 /* IIAOQ */ 69 mtctl %r1, %cr22 /* IPSW */ 71 mtctl %r0, %cr22 /* IPSW */ 133 mtctl %r0, %cr15
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H A D | hpmc.S | 126 mtctl %r4,ipsw 127 mtctl %r0,pcsq 128 mtctl %r0,pcsq 130 mtctl %r4,pcoq 132 mtctl %r4,pcoq 235 mtctl %r4,%cr24 /* Initialize kernel root pointer */ 236 mtctl %r4,%cr25 /* Initialize user root pointer */
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H A D | toc_asm.S | 46 mtctl %r4,%cr24 47 mtctl %r4,%cr25
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H A D | time.c | 117 mtctl(next_tick, 16); 160 mtctl(next_tick, 16); /* kick off Interval Timer (CR16) */
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H A D | pacache.S | 52 mtctl %r0, %cr17 /* Clear IIASQ tail */ 53 mtctl %r0, %cr17 /* Clear IIASQ head */ 54 mtctl %r1, %cr18 /* IIAOQ head */ 56 mtctl %r1, %cr18 /* IIAOQ tail */ 58 mtctl %r1, %ipsw 164 mtctl %r0, %cr17 /* Clear IIASQ tail */ 165 mtctl %r0, %cr17 /* Clear IIASQ head */ 166 mtctl %r1, %cr18 /* IIAOQ head */ 168 mtctl %r1, %cr18 /* IIAOQ tail */ 171 mtctl [all...] |
H A D | kgdb.c | 201 mtctl(-1, 0); 203 mtctl(0, 0);
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H A D | smp.c | 482 mtctl(~0UL, CR_EIRR); 484 mtctl(0, CR_EIRR);
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H A D | cache.c | 361 mtctl(pgd_lock, 28); 363 mtctl(pgd, 25); 365 mtctl(prot, 8);
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H A D | irq.c | 81 mtctl(mask, 23); 568 mtctl(~0UL, 23); /* EIRR : clear all pending external intr */
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H A D | perf_asm.S | 43 mtctl %r26,ccr ; turn on performance coprocessor 48 mtctl %r26,ccr ; turn off performance coprocessor 69 mtctl %r26,ccr ; turn on performance coprocessor 74 mtctl %r26,ccr ; turn off performance coprocessor
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H A D | setup.c | 293 mtctl(coproc_cfg.ccr_functional, 10);
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H A D | processor.c | 336 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
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H A D | entry.S | 773 mtctl %r25,%cr30 776 mtctl %r0, %cr0 /* Needed for single stepping */ 1669 mtctl %r3, %cr27 1822 mtctl %r2,%cr0 /* for immediate trap */ 2055 mtctl %rp, %cr11
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H A D | signal.c | 342 mtctl(-1, 0);
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H A D | syscall.S | 121 mtctl %r26, %cr27 /* move arg0 to the control register */
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/linux-master/arch/parisc/include/asm/ |
H A D | special_insns.h | 48 #define mtctl(gr, cr) \ macro 49 __asm__ __volatile__("mtctl %0,%1" \ 54 #define set_eiem(val) mtctl(val, CR_EIEM)
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H A D | mmu_context.h | 47 mtctl(__space_to_prot(context), 8); 58 mtctl(__pa(__ldcw_align(&pgd_lock->rlock.raw_lock)), 28); 60 mtctl(__pa(next->pgd), 25);
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H A D | assembly.h | 207 #define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r 412 mtctl %r3, %cr27 456 mtctl %r3, %cr27 472 mtctl %r0, %cr17 476 mtctl %r0, %cr18 481 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only 558 mtctl %r0, %cr17 /* Clear IIASQ tail */ 559 mtctl %r0, %cr17 /* Clear IIASQ head */ 560 mtctl %r1, %ipsw 562 mtctl [all...] |