Searched refs:msel (Results 1 - 5 of 5) sorted by relevance
| /linux-master/drivers/clk/nxp/ |
| H A D | clk-lpc18xx-cgu.c | 305 static u32 lpc18xx_pll0_msel2mdec(u32 msel) argument
309 switch (msel) {
314 for (i = msel; i <= LPC18XX_PLL0_MSEL_MAX; i++)
321 static u32 lpc18xx_pll0_msel2seli(u32 msel) argument
325 if (msel > 16384) return 1;
326 if (msel > 8192) return 2;
327 if (msel > 2048) return 4;
328 if (msel >= 501) return 8;
329 if (msel >= 60) {
330 tmp = 1024 / (msel
338 lpc18xx_pll0_msel2selp(u32 msel) argument
350 u32 ctrl, mdiv, msel, npdiv; local
454 u16 msel, nsel, psel; local
[all...] |
| /linux-master/drivers/fpga/ |
| H A D | socfpga-a10.c | 278 u32 msel, stat, mask; local
286 /* Check for passive parallel (msel == 000 or 001) */
287 msel = socfpga_a10_fpga_read_stat(priv);
288 msel &= A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_MASK;
289 msel >>= A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SHIFT;
290 if ((msel != 0) && (msel != 1)) {
291 dev_dbg(&mgr->dev, "Fail: invalid msel=%d\n", msel);
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| H A D | socfpga.c | 322 u32 msel; local
324 msel = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_STAT_OFST);
325 msel &= SOCFPGA_FPGMGR_STAT_MSEL_MASK;
326 msel >>= SOCFPGA_FPGMGR_STAT_MSEL_SHIFT;
329 if ((msel >= ARRAY_SIZE(cfgmgr_modes)) || !cfgmgr_modes[msel].valid)
332 return msel;
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| /linux-master/drivers/pinctrl/renesas/ |
| H A D | sh_pfc.h | 380 * - msel: Module selector
382 #define PINMUX_IPSR_NOGM(ipsr, fn, msel) \
383 PINMUX_DATA(fn##_MARK, FN_##fn, FN_##msel)
403 * - msel: Module selector
405 #define PINMUX_IPSR_MSEL(ipsr, fn, msel) \
406 PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr)
415 * - msel: Module selector
417 #define PINMUX_IPSR_PHYS_MSEL(ipsr, fn, psel, msel) \
418 PINMUX_DATA(fn##_MARK, FN_##psel, FN_##msel, FN_##fn, FN_##ipsr)
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| /linux-master/drivers/net/dsa/sja1105/ |
| H A D | sja1105_clocking.c | 57 u64 msel; member in struct:sja1105_cgu_pll_ctrl
329 sja1105_packing(buf, &cmd->msel, 23, 16, size, op);
706 pll.msel = 0x1;
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