Searched refs:mmUVD_SEMA_ADDR_HIGH_BASE_IDX (Results 1 - 4 of 4) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h135 #define mmUVD_SEMA_ADDR_HIGH_BASE_IDX 1 macro
H A Dvcn_2_0_0_offset.h807 #define mmUVD_SEMA_ADDR_HIGH_BASE_IDX 1 macro
H A Dvcn_2_5_offset.h810 #define mmUVD_SEMA_ADDR_HIGH_BASE_IDX 1 macro
H A Dvcn_3_0_0_offset.h1196 #define mmUVD_SEMA_ADDR_HIGH_BASE_IDX 1 macro

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