Searched refs:mmRLC_SPARE_INT_0_Sienna_Cichlid (Results 1 - 1 of 1) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/amdgpu/ | ||
| H A D | gfx_v10_0.c | 187 #define mmRLC_SPARE_INT_0_Sienna_Cichlid 0x4ca5 macro 4155 SOC15_REG_OFFSET(GC, 0, mmRLC_SPARE_INT_0_Sienna_Cichlid); |
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