Searched refs:mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED0 (Results 1 - 3 of 3) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h1295 #define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED0 0x172a macro
H A Ddce_11_2_d.h1184 #define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED0 0x172a macro
H A Ddce_11_0_d.h1106 #define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED0 0x172a macro

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