Searched refs:min_mem_set_clock (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/
H A Ddm_pp_interface.h81 uint32_t min_mem_set_clock; member in struct:amd_pp_display_configuration
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c69 adev->pm.pm_display_cfg.min_mem_set_clock =
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c1622 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock;
2410 if (dpm_table->dpm_state.hard_min_level < (hwmgr->display_config->min_mem_set_clock / 100))
2411 dpm_table->dpm_state.hard_min_level = hwmgr->display_config->min_mem_set_clock / 100;
2418 if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) {
H A Dvega20_hwmgr.c2349 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock;
3791 if (dpm_table->dpm_state.hard_min_level < (hwmgr->display_config->min_mem_set_clock / 100))
3792 dpm_table->dpm_state.hard_min_level = hwmgr->display_config->min_mem_set_clock / 100;
3799 if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) {
3812 hwmgr->display_config->min_mem_set_clock / 100 >= dpm_table->dpm_levels[dpm_table->count - 1].value)
H A Dsmu8_hwmgr.c1082 clocks.memoryClock = hwmgr->display_config->min_mem_set_clock != 0 ?
1083 hwmgr->display_config->min_mem_set_clock :
H A Dsmu10_hwmgr.c629 uint32_t min_mclk = hwmgr->display_config->min_mem_set_clock/100;
H A Dvega10_hwmgr.c3307 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock;
4082 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock;
H A Dsmu7_hwmgr.c3356 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock;
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c2083 min_clocks.memory_clock = smu->display_config->min_mem_set_clock;
H A Dsienna_cichlid_ppt.c1799 min_clocks.memory_clock = smu->display_config->min_mem_set_clock;

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