Searched refs:mhi_write_reg (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/bus/mhi/host/
H A Dboot.c40 mhi_write_reg(mhi_cntrl, base, BHIE_RXVECADDR_HIGH_OFFS,
43 mhi_write_reg(mhi_cntrl, base, BHIE_RXVECADDR_LOW_OFFS,
46 mhi_write_reg(mhi_cntrl, base, BHIE_RXVECSIZE_OFFS, mhi_buf->len);
198 mhi_write_reg(mhi_cntrl, base, BHIE_TXVECADDR_HIGH_OFFS,
201 mhi_write_reg(mhi_cntrl, base, BHIE_TXVECADDR_LOW_OFFS,
204 mhi_write_reg(mhi_cntrl, base, BHIE_TXVECSIZE_OFFS, mhi_buf->len);
257 mhi_write_reg(mhi_cntrl, base, BHI_STATUS, 0);
258 mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_HIGH,
260 mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_LOW,
262 mhi_write_reg(mhi_cntr
[all...]
H A Dpm.c505 mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0);
655 mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0);
1113 mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0);
1145 mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0);
H A Dmain.c64 void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, function
83 mhi_write_reg(mhi_cntrl, base, offset, tmp);
91 mhi_write_reg(mhi_cntrl, db_addr, 4, upper_32_bits(db_val));
92 mhi_write_reg(mhi_cntrl, db_addr, 0, lower_32_bits(db_val));
179 mhi_write_reg(mhi_cntrl, mhi_cntrl->regs, MHI_SOC_RESET_REQ_OFFSET,
H A Dinternal.h363 void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
H A Dinit.c568 mhi_write_reg(mhi_cntrl, base, reg_info[i].offset,
/linux-master/drivers/accel/qaic/
H A Dmhi_controller.c462 static void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 val) function
538 mhi_cntrl->write_reg = mhi_write_reg;

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