Searched refs:mem_clk (Results 1 - 11 of 11) sorted by relevance
| /linux-master/sound/soc/fsl/ |
| H A D | fsl_asrc_common.h | 62 * @mem_clk: clock source to access register
84 struct clk *mem_clk; member in struct:fsl_asrc
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| H A D | fsl_asrc.c | 1117 asrc->mem_clk = devm_clk_get(&pdev->dev, "mem");
1118 if (IS_ERR(asrc->mem_clk)) {
1120 return PTR_ERR(asrc->mem_clk);
1270 ret = clk_prepare_enable(asrc->mem_clk);
1333 clk_disable_unprepare(asrc->mem_clk);
1353 clk_disable_unprepare(asrc->mem_clk);
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| H A D | fsl_easrc.c | 1916 easrc->mem_clk = devm_clk_get(dev, "mem");
1917 if (IS_ERR(easrc->mem_clk)) {
1919 return PTR_ERR(easrc->mem_clk);
1999 clk_disable_unprepare(easrc->mem_clk);
2018 ret = clk_prepare_enable(easrc->mem_clk);
2084 clk_disable_unprepare(easrc->mem_clk);
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| /linux-master/drivers/gpu/drm/imagination/ |
| H A D | pvr_device.c | 78 * struct pvr_device->mem_clk.
99 struct clk *mem_clk; local
111 mem_clk = devm_clk_get_optional(drm_dev->dev, "mem");
112 if (IS_ERR(mem_clk))
113 return dev_err_probe(drm_dev->dev, PTR_ERR(mem_clk),
118 pvr_dev->mem_clk = mem_clk;
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| H A D | pvr_power.c | 251 clk_disable_unprepare(pvr_dev->mem_clk);
281 err = clk_prepare_enable(pvr_dev->mem_clk);
296 clk_disable_unprepare(pvr_dev->mem_clk);
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| H A D | pvr_device.h | 126 * @mem_clk: Optional memory clock.
131 struct clk *mem_clk; member in struct:pvr_device
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| /linux-master/drivers/staging/sm750fb/ |
| H A D | sm750.h | 45 ushort mem_clk; member in struct:init_status
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| H A D | sm750_hw.c | 104 if (parm->mem_clk == 0)
105 parm->mem_clk = parm->chip_clk;
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| H A D | sm750.c | 915 sm750_dev->initParm.mem_clk = 0;
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| /linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | vega12_hwmgr.c | 1356 uint32_t mem_clk; local
1363 vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false) == 0,
1368 vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true) == 0,
1372 return (mem_clk * 100);
1436 uint32_t mem_clk = 0; local
1442 &mem_clk) == 0,
1446 *mclk_freq = mem_clk * 100;
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| H A D | vega20_hwmgr.c | 2082 uint32_t mem_clk; local
2090 ret = vega20_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false);
2095 ret = vega20_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true);
2101 return (mem_clk * 100);
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Completed in 173 milliseconds