Searched refs:mc_status (Results 1 - 8 of 8) sorted by relevance
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_mca.c | 31 uint64_t mc_status) 35 AMDGPU_MCA_ERROR_TYPE_DE, &mc_status); 44 uint64_t mc_status = RREG64_PCIE(mc_status_addr); local 46 if (REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && 47 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) 55 uint64_t mc_status = RREG64_PCIE(mc_status_addr); local 57 if ((REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && 58 (REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || 59 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 || 60 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST 30 amdgpu_mca_is_deferred_error(struct amdgpu_device *adev, uint64_t mc_status) argument [all...] |
/linux-master/drivers/bus/fsl-mc/ |
H A D | mc-sys.c | 157 * @mc_status: MC command completion status 161 enum mc_cmd_status *mc_status) 193 *mc_status = status; 203 * @mc_status: MC command completion status 207 enum mc_cmd_status *mc_status) 233 *mc_status = status; 159 mc_polling_wait_preemptible(struct fsl_mc_io *mc_io, struct fsl_mc_command *cmd, enum mc_cmd_status *mc_status) argument 205 mc_polling_wait_atomic(struct fsl_mc_io *mc_io, struct fsl_mc_command *cmd, enum mc_cmd_status *mc_status) argument
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/linux-master/drivers/media/platform/samsung/s5p-mfc/ |
H A D | s5p_mfc_ctrl.c | 123 unsigned int mc_status; local 167 mc_status = mfc_read(dev, S5P_FIMV_MC_STATUS); 169 } while (mc_status & 0x3);
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/linux-master/drivers/net/ethernet/i825xx/ |
H A D | ether1.h | 118 unsigned short mc_status; member in struct:__anon427
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H A D | ether1.c | 558 while (((status = ether1_readw(dev, MC_ADDR, mc_t, mc_status, DISABLEIRQS))
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/linux-master/include/xen/interface/ |
H A D | xen-mca.h | 101 uint64_t mc_status; /* bank status */ member in struct:mcinfo_bank
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/linux-master/drivers/xen/ |
H A D | mcelog.c | 281 m.status = mc_bank->mc_status;
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/linux-master/drivers/edac/ |
H A D | i7core_edac.c | 204 u32 mc_status; member in struct:i7core_info 400 #define ECC_ENABLED(pvt) ((pvt)->info.mc_status & (1 << 4)) 401 #define CH_DISABLED(pvt, ch) ((pvt)->info.mc_status & (1 << ch)) 503 pci_read_config_dword(pdev, MC_STATUS, &pvt->info.mc_status); 509 pvt->info.mc_status, pvt->info.max_dod, pvt->info.ch_map);
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