Searched refs:mbox (Results 1 - 25 of 216) sorted by relevance

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/linux-master/drivers/net/ethernet/cavium/liquidio/
H A Docteon_mailbox.c31 * @mbox: Pointer mailbox
33 * Reads the 8-bytes of data from the mbox register
36 int octeon_mbox_read(struct octeon_mbox *mbox) argument
41 spin_lock(&mbox->lock);
43 msg.u64 = readq(mbox->mbox_read_reg);
46 spin_unlock(&mbox->lock);
50 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) {
51 mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64;
52 mbox
134 struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no]; local
236 octeon_mbox_process_cmd(struct octeon_mbox *mbox, struct octeon_mbox_cmd *mbox_cmd) argument
293 octeon_mbox_process_message(struct octeon_mbox *mbox) argument
357 struct octeon_mbox *mbox = oct->mbox[q_no]; local
[all...]
/linux-master/drivers/soc/apple/
H A Dmailbox.c99 int apple_mbox_send(struct apple_mbox *mbox, const struct apple_mbox_msg msg, argument
107 spin_lock_irqsave(&mbox->tx_lock, flags);
108 mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->a2i_control);
110 while (mbox_ctrl & mbox->hw->control_full) {
113 mbox->regs + mbox->hw->a2i_control, mbox_ctrl,
114 !(mbox_ctrl & mbox->hw->control_full), 100,
118 spin_unlock_irqrestore(&mbox->tx_lock, flags);
133 if (mbox
165 struct apple_mbox *mbox = data; local
182 apple_mbox_poll_locked(struct apple_mbox *mbox) argument
218 struct apple_mbox *mbox = data; local
227 apple_mbox_poll(struct apple_mbox *mbox) argument
240 apple_mbox_start(struct apple_mbox *mbox) argument
271 apple_mbox_stop(struct apple_mbox *mbox) argument
287 struct apple_mbox *mbox; local
328 struct apple_mbox *mbox; local
[all...]
H A Dmailbox.h35 void (*rx)(struct apple_mbox *mbox, struct apple_mbox_msg msg, void *cookie);
42 int apple_mbox_start(struct apple_mbox *mbox);
43 void apple_mbox_stop(struct apple_mbox *mbox);
44 int apple_mbox_poll(struct apple_mbox *mbox);
45 int apple_mbox_send(struct apple_mbox *mbox, struct apple_mbox_msg msg,
/linux-master/drivers/mailbox/
H A Dhi6220-mailbox.c90 static void mbox_set_state(struct hi6220_mbox *mbox, argument
95 status = readl(mbox->base + MBOX_MODE_REG(slot));
97 writel(status, mbox->base + MBOX_MODE_REG(slot));
100 static void mbox_set_mode(struct hi6220_mbox *mbox, argument
105 mode = readl(mbox->base + MBOX_MODE_REG(slot));
107 writel(mode, mbox->base + MBOX_MODE_REG(slot));
113 struct hi6220_mbox *mbox = mchan->parent; local
117 BUG_ON(mbox->tx_irq_mode);
119 state = readl(mbox->base + MBOX_MODE_REG(mchan->slot));
126 struct hi6220_mbox *mbox local
151 struct hi6220_mbox *mbox = p; local
197 struct hi6220_mbox *mbox = mchan->parent; local
209 struct hi6220_mbox *mbox = mchan->parent; local
226 struct hi6220_mbox *mbox = dev_get_drvdata(controller->dev); local
267 struct hi6220_mbox *mbox; local
[all...]
H A Dmailbox-altera.c60 static inline int altera_mbox_full(struct altera_mbox *mbox) argument
64 status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG);
68 static inline int altera_mbox_pending(struct altera_mbox *mbox) argument
72 status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG);
76 static void altera_mbox_rx_intmask(struct altera_mbox *mbox, bool enable) argument
80 mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG);
85 writel_relaxed(mask, mbox->mbox_base + MAILBOX_INTMASK_REG);
88 static void altera_mbox_tx_intmask(struct altera_mbox *mbox, bool enable) argument
92 mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG);
97 writel_relaxed(mask, mbox
100 altera_mbox_is_sender(struct altera_mbox *mbox) argument
119 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
133 struct altera_mbox *mbox = from_timer(mbox, t, rxpoll_timer); local
144 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
163 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
182 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
208 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
235 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
243 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
250 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
266 struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan); local
287 struct altera_mbox *mbox; local
[all...]
H A Dbcm2835-mailbox.c63 return container_of(link->mbox, struct bcm2835_mbox, controller);
68 struct bcm2835_mbox *mbox = dev_id; local
69 struct device *dev = mbox->controller.dev;
70 struct mbox_chan *link = &mbox->controller.chans[0];
72 while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) {
73 u32 msg = readl(mbox->regs + MAIL0_RD);
82 struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); local
85 spin_lock(&mbox->lock);
86 writel(msg, mbox->regs + MAIL1_WRT);
87 dev_dbg(mbox
94 struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); local
104 struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); local
111 struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); local
127 bcm2835_mbox_index_xlate(struct mbox_controller *mbox, const struct of_phandle_args *sp) argument
140 struct bcm2835_mbox *mbox; local
[all...]
H A Dmailbox-mpfs.c74 static bool mpfs_mbox_busy(struct mpfs_mbox *mbox) argument
78 status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
85 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; local
86 struct mpfs_mss_response *response = mbox->response;
89 if (mpfs_mbox_busy(mbox))
98 val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
106 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; local
112 mbox->response = msg->response;
113 mbox->resp_offset = msg->resp_offset;
115 if (mpfs_mbox_busy(mbox))
153 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; local
186 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; local
197 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; local
212 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv; local
226 struct mpfs_mbox *mbox; local
[all...]
H A Dsun6i-msgbox.c44 #define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__)
58 return chan - chan->mbox->chans;
68 struct sun6i_msgbox *mbox = dev_id; local
73 status = readl(mbox->regs + LOCAL_IRQ_EN_REG) &
74 readl(mbox->regs + LOCAL_IRQ_STAT_REG);
80 struct mbox_chan *chan = &mbox->controller.chans[n];
86 uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n));
88 mbox_dbg(mbox, "Channel %d received 0x%08x\n", n, msg);
93 writel(RX_IRQ(n), mbox
101 struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); local
117 struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); local
141 struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); local
164 struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); local
181 struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); local
200 struct sun6i_msgbox *mbox; local
292 struct sun6i_msgbox *mbox = platform_get_drvdata(pdev); local
[all...]
H A Darmada-37xx-rwtm-mailbox.c45 struct a37xx_mbox *mbox = chan->con_priv; local
49 rx_msg.retval = readl(mbox->base + RWTM_MBOX_RETURN_STATUS);
51 rx_msg.status[i] = readl(mbox->base + RWTM_MBOX_STATUS(i));
59 struct a37xx_mbox *mbox = chan->con_priv; local
62 reg = readl(mbox->base + RWTM_HOST_INT_RESET);
68 dev_err(mbox->dev, "Secure processor command queue full\n");
70 writel(reg, mbox->base + RWTM_HOST_INT_RESET);
79 struct a37xx_mbox *mbox = chan->con_priv; local
87 reg = readl(mbox->base + RWTM_MBOX_FIFO_STATUS);
89 dev_warn(mbox
105 struct a37xx_mbox *mbox = chan->con_priv; local
127 struct a37xx_mbox *mbox = chan->con_priv; local
145 struct a37xx_mbox *mbox; local
[all...]
H A Dhi3660-mailbox.c25 #define MBOX_BASE(mbox, ch) ((mbox)->base + ((ch) * 0x40))
80 static struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox) argument
82 return container_of(mbox, struct hi3660_mbox, controller);
88 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox); local
89 struct hi3660_chan_info *mchan = &mbox->mchan[ch];
90 void __iomem *base = MBOX_BASE(mbox, ch);
102 dev_err(mbox->dev, "%s: timeout for receiving ack\n", __func__);
114 struct hi3660_mbox *mbox local
136 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox); local
177 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox); local
214 struct hi3660_mbox *mbox = to_hi3660_mbox(controller); local
240 struct hi3660_mbox *mbox; local
[all...]
H A Dmtk-adsp-mailbox.c19 struct mbox_controller mbox; member in struct:mtk_adsp_mbox_priv
31 static inline struct mtk_adsp_mbox_priv *get_mtk_adsp_mbox_priv(struct mbox_controller *mbox) argument
33 return container_of(mbox, struct mtk_adsp_mbox_priv, mbox);
39 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
56 static struct mbox_chan *mtk_adsp_mbox_xlate(struct mbox_controller *mbox, argument
59 return mbox->chans;
64 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
66 /* Clear ADSP mbox command */
75 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
111 struct mbox_controller *mbox; local
[all...]
H A Dmailbox.c78 err = chan->mbox->ops->send_data(chan, data);
88 spin_lock_irqsave(&chan->mbox->poll_hrt_lock, flags);
89 hrtimer_start(&chan->mbox->poll_hrt, 0, HRTIMER_MODE_REL);
90 spin_unlock_irqrestore(&chan->mbox->poll_hrt_lock, flags);
120 struct mbox_controller *mbox = local
126 for (i = 0; i < mbox->num_chans; i++) {
127 struct mbox_chan *chan = &mbox->chans[i];
130 txdone = chan->mbox->ops->last_tx_done(chan);
139 spin_lock_irqsave(&mbox->poll_hrt_lock, flags);
141 hrtimer_forward_now(hrtimer, ms_to_ktime(mbox
406 struct mbox_controller *mbox; local
508 of_mbox_index_xlate(struct mbox_controller *mbox, const struct of_phandle_args *sp) argument
525 mbox_controller_register(struct mbox_controller *mbox) argument
577 mbox_controller_unregister(struct mbox_controller *mbox) argument
600 struct mbox_controller **mbox = res; local
607 struct mbox_controller **mbox = res; local
627 devm_mbox_controller_register(struct device *dev, struct mbox_controller *mbox) argument
661 devm_mbox_controller_unregister(struct device *dev, struct mbox_controller *mbox) argument
[all...]
H A Domap-mailbox.c68 struct omap_mbox *mbox; member in struct:omap_mbox_queue
144 static u32 mbox_fifo_read(struct omap_mbox *mbox) argument
146 struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
148 return mbox_read_reg(mbox->parent, fifo->msg);
151 static void mbox_fifo_write(struct omap_mbox *mbox, u32 msg) argument
153 struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
155 mbox_write_reg(mbox->parent, msg, fifo->msg);
158 static int mbox_fifo_empty(struct omap_mbox *mbox) argument
160 struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
162 return (mbox_read_reg(mbox
165 mbox_fifo_full(struct omap_mbox *mbox) argument
173 ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) argument
186 is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) argument
200 _omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) argument
213 _omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) argument
232 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); local
243 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); local
281 __mbox_tx_interrupt(struct omap_mbox *mbox) argument
288 __mbox_rx_interrupt(struct omap_mbox *mbox) argument
315 struct omap_mbox *mbox = p; local
326 mbox_queue_alloc(struct omap_mbox *mbox, void (*work)(struct work_struct *)) argument
357 omap_mbox_startup(struct omap_mbox *mbox) argument
387 omap_mbox_fini(struct omap_mbox *mbox) argument
398 struct omap_mbox *_mbox, *mbox = NULL; local
418 struct omap_mbox *mbox = NULL; local
463 struct omap_mbox *mbox = mboxes[i]; local
507 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); local
522 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); local
531 omap_mbox_chan_send_noirq(struct omap_mbox *mbox, u32 msg) argument
549 omap_mbox_chan_send(struct omap_mbox *mbox, u32 msg) argument
565 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); local
668 struct omap_mbox *mbox; local
690 struct omap_mbox **list, *mbox, *mboxblk; local
[all...]
H A Darm_mhu_db.c41 struct mbox_controller mbox; member in struct:arm_mhu
59 mhu_db_mbox_to_channel(struct mbox_controller *mbox, unsigned int pchan, argument
65 for (i = 0; i < mbox->num_chans; i++) {
66 chan_info = mbox->chans[i].con_priv;
69 return &mbox->chans[i];
99 struct mbox_controller *mbox = &mhu->mbox; local
112 chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
115 dev_err(mbox->dev,
168 struct mbox_controller *mbox local
186 mhu_db_mbox_xlate(struct mbox_controller *mbox, const struct of_phandle_args *spec) argument
[all...]
/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmbox.c13 #include "mbox.h"
18 void __otx2_mbox_reset(struct otx2_mbox *mbox, int devid) argument
20 struct otx2_mbox_dev *mdev = &mbox->dev[devid];
24 tx_hdr = hw_mbase + mbox->tx_start;
25 rx_hdr = hw_mbase + mbox->rx_start;
36 void otx2_mbox_reset(struct otx2_mbox *mbox, int devid) argument
38 struct otx2_mbox_dev *mdev = &mbox->dev[devid];
41 __otx2_mbox_reset(mbox, devid);
46 void otx2_mbox_destroy(struct otx2_mbox *mbox) argument
48 mbox
56 otx2_mbox_setup(struct otx2_mbox *mbox, struct pci_dev *pdev, void *reg_base, int direction, int ndevs) argument
130 otx2_mbox_init(struct otx2_mbox *mbox, void *hwbase, struct pci_dev *pdev, void *reg_base, int direction, int ndevs) argument
158 otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase, struct pci_dev *pdev, void *reg_base, int direction, int ndevs, unsigned long *pf_bmap) argument
187 otx2_mbox_wait_for_rsp(struct otx2_mbox *mbox, int devid) argument
203 otx2_mbox_busy_poll_for_rsp(struct otx2_mbox *mbox, int devid) argument
217 otx2_mbox_msg_send_data(struct otx2_mbox *mbox, int devid, u64 data) argument
270 otx2_mbox_msg_send(struct otx2_mbox *mbox, int devid) argument
276 otx2_mbox_msg_send_up(struct otx2_mbox *mbox, int devid) argument
282 otx2_mbox_wait_for_zero(struct otx2_mbox *mbox, int devid) argument
304 otx2_mbox_alloc_msg_rsp(struct otx2_mbox *mbox, int devid, int size, int size_rsp) argument
339 otx2_mbox_get_rsp(struct otx2_mbox *mbox, int devid, struct mbox_msghdr *msg) argument
373 otx2_mbox_check_rsp_msgs(struct otx2_mbox *mbox, int devid) argument
413 otx2_reply_invalid_msg(struct otx2_mbox *mbox, int devid, u16 pcifunc, u16 id) argument
429 otx2_mbox_nonempty(struct otx2_mbox *mbox, int devid) argument
[all...]
/linux-master/drivers/net/wireless/ti/wl12xx/
H A Devent.c36 struct wl12xx_event_mailbox *mbox = wl->mbox; local
40 vector = le32_to_cpu(mbox->events_vector);
41 vector &= ~(le32_to_cpu(mbox->events_mask));
47 mbox->scheduled_scan_status);
56 mbox->scheduled_scan_status);
63 mbox->scheduled_scan_status);
66 mbox->soft_gemini_sense_info);
72 wlcore_event_rssi_trigger(wl, mbox->rssi_snr_trigger_metric);
76 BIT(mbox
[all...]
/linux-master/drivers/gpu/drm/xe/compat-i915-headers/
H A Dintel_pcode.h13 snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, argument
16 return xe_pcode_write_timeout(__compat_uncore_to_gt(uncore), mbox, val,
21 snb_pcode_write(struct intel_uncore *uncore, u32 mbox, u32 val) argument
24 return xe_pcode_write(__compat_uncore_to_gt(uncore), mbox, val);
28 snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1) argument
30 return xe_pcode_read(__compat_uncore_to_gt(uncore), mbox, val, val1);
34 skl_pcode_request(struct intel_uncore *uncore, u32 mbox, argument
38 return xe_pcode_request(__compat_uncore_to_gt(uncore), mbox, request, reply_mask, reply,
/linux-master/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_ctrl_mbox.c27 /* Size of mbox info in bytes */
29 /* Size of mbox host to fw queue info in bytes */
31 /* Size of mbox fw to host queue info in bytes */
74 int octep_ctrl_mbox_init(struct octep_ctrl_mbox *mbox) argument
78 if (!mbox)
81 if (!mbox->barmem) {
82 pr_info("octep_ctrl_mbox : Invalid barmem %p\n", mbox->barmem);
86 magic_num = readq(OCTEP_CTRL_MBOX_INFO_MAGIC_NUM(mbox->barmem));
92 status = readq(OCTEP_CTRL_MBOX_INFO_FW_STATUS(mbox->barmem));
98 fw_versions = readq(OCTEP_CTRL_MBOX_INFO_FW_VERSION(mbox
160 octep_ctrl_mbox_send(struct octep_ctrl_mbox *mbox, struct octep_ctrl_mbox_msg *msg) argument
225 octep_ctrl_mbox_recv(struct octep_ctrl_mbox *mbox, struct octep_ctrl_mbox_msg *msg) argument
260 octep_ctrl_mbox_uninit(struct octep_ctrl_mbox *mbox) argument
[all...]
/linux-master/drivers/crypto/marvell/octeontx2/
H A Dotx2_cpt_mbox_common.c7 int otx2_cpt_send_mbox_msg(struct otx2_mbox *mbox, struct pci_dev *pdev) argument
11 otx2_mbox_msg_send(mbox, 0);
12 ret = otx2_mbox_wait_for_rsp(mbox, 0);
24 int otx2_cpt_send_ready_msg(struct otx2_mbox *mbox, struct pci_dev *pdev) argument
28 req = otx2_mbox_alloc_msg_rsp(mbox, 0, sizeof(*req),
38 return otx2_cpt_send_mbox_msg(mbox, pdev);
42 int otx2_cpt_send_af_reg_requests(struct otx2_mbox *mbox, struct pci_dev *pdev) argument
44 return otx2_cpt_send_mbox_msg(mbox, pdev);
48 static int otx2_cpt_add_read_af_reg(struct otx2_mbox *mbox, argument
55 otx2_mbox_alloc_msg_rsp(mbox,
74 otx2_cpt_add_write_af_reg(struct otx2_mbox *mbox, struct pci_dev *pdev, u64 reg, u64 val, int blkaddr) argument
100 otx2_cpt_read_af_reg(struct otx2_mbox *mbox, struct pci_dev *pdev, u64 reg, u64 *val, int blkaddr) argument
113 otx2_cpt_write_af_reg(struct otx2_mbox *mbox, struct pci_dev *pdev, u64 reg, u64 val, int blkaddr) argument
128 struct otx2_mbox *mbox = lfs->mbox; local
158 struct otx2_mbox *mbox = lfs->mbox; local
187 struct otx2_mbox *mbox = lfs->mbox; local
218 otx2_cpt_sync_mbox_msg(struct otx2_mbox *mbox) argument
235 struct otx2_mbox *mbox = lfs->mbox; local
[all...]
/linux-master/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_dmac_flt.c17 mutex_lock(&pf->mbox.lock);
19 req = otx2_mbox_alloc_msg_cgx_mac_addr_add(&pf->mbox);
21 mutex_unlock(&pf->mbox.lock);
26 err = otx2_sync_mbox_msg(&pf->mbox);
30 otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr);
34 mutex_unlock(&pf->mbox.lock);
44 mutex_lock(&pf->mbox.lock);
46 req = otx2_mbox_alloc_msg_cgx_mac_addr_set(&pf->mbox);
48 mutex_unlock(&pf->mbox
[all...]
/linux-master/drivers/net/wireless/ti/wl1251/
H A Devent.c16 struct event_mailbox *mbox)
21 mbox->scheduled_scan_status,
22 mbox->scheduled_scan_channels);
41 struct event_mailbox *mbox)
45 wl1251_debug(DEBUG_EVENT, "ps status: %x", mbox->ps_status);
47 switch (mbox->ps_status) {
76 static void wl1251_event_mbox_dump(struct event_mailbox *mbox) argument
79 wl1251_debug(DEBUG_EVENT, "\tvector: 0x%x", mbox->events_vector);
80 wl1251_debug(DEBUG_EVENT, "\tmask: 0x%x", mbox->events_mask);
83 static int wl1251_event_process(struct wl1251 *wl, struct event_mailbox *mbox) argument
15 wl1251_event_scan_complete(struct wl1251 *wl, struct event_mailbox *mbox) argument
40 wl1251_event_ps_report(struct wl1251 *wl, struct event_mailbox *mbox) argument
203 struct event_mailbox *mbox; local
[all...]
/linux-master/drivers/gpu/drm/i915/
H A Dintel_pcode.h13 int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1);
14 int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val,
16 #define snb_pcode_write(uncore, mbox, val) \
17 snb_pcode_write_timeout(uncore, mbox, val, 500, 0)
19 int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request,
H A Dintel_pcode.c10 static int gen6_check_mailbox_status(u32 mbox) argument
12 switch (mbox & GEN6_PCODE_ERROR_MASK) {
25 MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK);
30 static int gen7_check_mailbox_status(u32 mbox) argument
32 switch (mbox & GEN6_PCODE_ERROR_MASK) {
50 MISSING_CASE(mbox & GEN6_PCODE_ERROR_MASK);
55 static int __snb_pcode_rw(struct intel_uncore *uncore, u32 mbox, argument
74 GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
81 &mbox))
90 return gen7_check_mailbox_status(mbox);
95 snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1) argument
112 snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int fast_timeout_us, int slow_timeout_ms) argument
131 skl_pcode_try_request(struct intel_uncore *uncore, u32 mbox, u32 request, u32 reply_mask, u32 reply, u32 *status) argument
159 skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_base_ms) argument
248 u32 mbox; local
264 u32 mbox; local
[all...]
/linux-master/drivers/gpu/drm/xe/
H A Dxe_pcode.h16 int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
17 int xe_pcode_write_timeout(struct xe_gt *gt, u32 mbox, u32 val,
19 #define xe_pcode_write(gt, mbox, val) \
20 xe_pcode_write_timeout(gt, mbox, val, 1)
22 int xe_pcode_request(struct xe_gt *gt, u32 mbox, u32 request,
/linux-master/drivers/net/wireless/ti/wl18xx/
H A Devent.c118 struct wl18xx_event_mailbox *mbox = wl->mbox; local
121 vector = le32_to_cpu(mbox->events_vector);
126 mbox->number_of_scan_results);
134 le16_to_cpu(mbox->time_sync_tsf_high_msb),
135 le16_to_cpu(mbox->time_sync_tsf_high_lsb),
136 le16_to_cpu(mbox->time_sync_tsf_low_msb),
137 le16_to_cpu(mbox->time_sync_tsf_low_lsb));
141 mbox->radar_channel,
142 wl18xx_radar_type_decode(mbox
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