/linux-master/arch/mips/cavium-octeon/executive/ |
H A D | cvmx-helper-errata.c | 51 int lane; local 54 for (lane = 0; lane < 4; lane++) { 56 * Each lane has 268 bits. We need to set
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/linux-master/drivers/phy/freescale/ |
H A D | phy-fsl-lynx-28g.c | 24 #define LYNX_28G_LNa_PCC_OFFSET(lane) (4 * (LYNX_28G_NUM_LANE - (lane->id) - 1)) 45 /* Per SerDes lane registers */ 47 #define LYNX_28G_LNaGCR0(lane) (0x800 + (lane) * 0x100 + 0x0) 56 #define LYNX_28G_LNaTRSTCTL(lane) (0x800 + (lane) * 0x100 + 0x20) 62 #define LYNX_28G_LNaTGCR0(lane) (0x800 + (lane) * 0x100 + 0x24) 71 #define LYNX_28G_LNaTECR0(lane) ( 135 struct lynx_28g_lane lane[LYNX_28G_NUM_LANE]; member in struct:lynx_28g_priv 194 lynx_28g_lane_set_nrate(struct lynx_28g_lane *lane, struct lynx_28g_pll *pll, phy_interface_t intf) argument 227 lynx_28g_lane_set_pll(struct lynx_28g_lane *lane, struct lynx_28g_pll *pll) argument 239 lynx_28g_cleanup_lane(struct lynx_28g_lane *lane) argument 262 lynx_28g_lane_set_sgmii(struct lynx_28g_lane *lane) argument 298 lynx_28g_lane_set_10gbaser(struct lynx_28g_lane *lane) argument 336 struct lynx_28g_lane *lane = phy_get_drvdata(phy); local 360 struct lynx_28g_lane *lane = phy_get_drvdata(phy); local 384 struct lynx_28g_lane *lane = phy_get_drvdata(phy); local 434 struct lynx_28g_lane *lane = phy_get_drvdata(phy); local 448 struct lynx_28g_lane *lane = phy_get_drvdata(phy); local 512 struct lynx_28g_lane *lane; local 540 lynx_28g_lane_read_configuration(struct lynx_28g_lane *lane) argument 589 struct lynx_28g_lane *lane = &priv->lane[i]; local [all...] |
/linux-master/drivers/net/dsa/b53/ |
H A D | b53_serdes.c | 42 static void b53_serdes_set_lane(struct b53_device *dev, u8 lane) argument 44 if (dev->serdes_lane == lane) 47 WARN_ON(lane > 1); 50 SERDES_XGXSBLK0_BLOCKADDRESS, lane); 51 dev->serdes_lane = lane; 54 static void b53_serdes_write(struct b53_device *dev, u8 lane, argument 57 b53_serdes_set_lane(dev, lane); 61 static u16 b53_serdes_read(struct b53_device *dev, u8 lane, argument 64 b53_serdes_set_lane(dev, lane); 74 u8 lane local 92 u8 lane = pcs_to_b53_pcs(pcs)->lane; local 106 u8 lane = pcs_to_b53_pcs(pcs)->lane; local 142 u8 lane = b53_serdes_map_lane(dev, port); local 168 u8 lane = b53_serdes_map_lane(dev, port); local 198 u8 lane = b53_serdes_map_lane(dev, port); local 214 u8 lane = b53_serdes_map_lane(dev, port); local [all...] |
/linux-master/drivers/phy/marvell/ |
H A D | phy-mvebu-cp110-comphy.c | 129 * A lane is described by the following bitfields: 182 unsigned lane; member in struct:mvebu_comphy_conf 190 .lane = _lane, \ 200 .lane = _lane, \ 209 /* lane 0 */ 214 /* lane 1 */ 221 /* lane 2 */ 230 /* lane 3 */ 237 /* lane 4 */ 250 /* lane 276 mvebu_comphy_smc(unsigned long function, unsigned long phys, unsigned long lane, unsigned long mode) argument 295 mvebu_comphy_get_mode(bool fw_mode, int lane, int port, enum phy_mode mode, int submode) argument 325 mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode, int submode) argument 331 mvebu_comphy_get_fw_mode(int lane, int port, enum phy_mode mode, int submode) argument 337 mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane) argument 453 mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane) argument 496 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 529 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 582 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 724 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 768 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 856 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 876 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 899 struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); local 922 struct mvebu_comphy_lane *lane; local 1037 struct mvebu_comphy_lane *lane; local [all...] |
H A D | phy-mvebu-a3700-comphy.c | 40 * When accessing common PHY lane registers directly, we need to shift by 1, 175 * This register is not from PHY lane register space. It only exists in the 176 * indirect register space, before the actual PHY lane 2 registers. So the 184 #define COMPHY_PHY_REG(lane, reg) (((1 - (lane)) * 0x28) + ((reg) & 0x3f)) 227 unsigned int lane; member in struct:mvebu_a3700_comphy_conf 234 .lane = _lane, \ 246 /* lane 0 */ 251 /* lane 1 */ 256 /* lane 397 comphy_lane_reg_set(struct mvebu_a3700_comphy_lane *lane, u16 reg, u16 data, u16 mask) argument 415 comphy_lane_reg_poll(struct mvebu_a3700_comphy_lane *lane, u16 reg, u16 bits, ulong sleep_us, ulong timeout_us) argument 447 comphy_periph_reg_set(struct mvebu_a3700_comphy_lane *lane, u8 reg, u32 data, u32 mask) argument 454 comphy_periph_reg_poll(struct mvebu_a3700_comphy_lane *lane, u8 reg, u32 bits, ulong sleep_us, ulong timeout_us) argument 468 mvebu_a3700_comphy_set_phy_selector(struct mvebu_a3700_comphy_lane *lane) argument 532 mvebu_a3700_comphy_sata_power_on(struct mvebu_a3700_comphy_lane *lane) argument 599 comphy_gbe_phy_init(struct mvebu_a3700_comphy_lane *lane, bool is_1gbps) argument 628 mvebu_a3700_comphy_ethernet_power_on(struct mvebu_a3700_comphy_lane *lane) argument 820 mvebu_a3700_comphy_usb3_power_on(struct mvebu_a3700_comphy_lane *lane) argument 985 mvebu_a3700_comphy_pcie_power_on(struct mvebu_a3700_comphy_lane *lane) argument 1073 mvebu_a3700_comphy_sata_power_off(struct mvebu_a3700_comphy_lane *lane) argument 1085 mvebu_a3700_comphy_ethernet_power_off(struct mvebu_a3700_comphy_lane *lane) argument 1096 mvebu_a3700_comphy_pcie_power_off(struct mvebu_a3700_comphy_lane *lane) argument 1103 mvebu_a3700_comphy_usb3_power_off(struct mvebu_a3700_comphy_lane *lane) argument 1111 mvebu_a3700_comphy_check_mode(int lane, enum phy_mode mode, int submode) argument 1137 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); local 1158 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); local 1187 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); local 1218 struct mvebu_a3700_comphy_lane *lane; local 1305 struct mvebu_a3700_comphy_lane *lane; local [all...] |
H A D | phy-armada38x-comphy.c | 47 struct a38x_comphy_lane lane[MAX_A38X_COMPHY]; member in struct:a38x_comphy 52 * row index = serdes lane, 64 static void a38x_set_conf(struct a38x_comphy_lane *lane, bool enable) argument 66 struct a38x_comphy *priv = lane->priv; 72 conf |= BIT(lane->port); 74 conf &= ~BIT(lane->port); 79 static void a38x_comphy_set_reg(struct a38x_comphy_lane *lane, argument 84 val = readl_relaxed(lane->base + offset) & ~mask; 85 writel(val | value, lane->base + offset); 88 static void a38x_comphy_set_speed(struct a38x_comphy_lane *lane, argument 97 a38x_comphy_poll(struct a38x_comphy_lane *lane, unsigned int offset, u32 mask, u32 value) argument 120 struct a38x_comphy_lane *lane = phy_get_drvdata(phy); local 165 struct a38x_comphy_lane *lane; local [all...] |
/linux-master/include/linux/platform_data/media/ |
H A D | mmp-camera.h | 23 int lane; /* ccic used lane number; 0 means DVP mode */ member in struct:mmp_camera_platform_data
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/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_dp_training_fixed_vs_pe_retimer.c | 52 uint8_t lane; local 54 /* W/A to read lane settings requested by DPRX */ 65 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { 66 dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_SET = (dprx_vs >> (2 * lane)) & 0x3; 67 dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_SET = (dprx_pe >> (2 * lane)) & 0x3; 80 uint8_t lane local 106 uint8_t lane = 0; local 212 uint8_t lane = 0; local [all...] |
H A D | link_dp_training.c | 305 uint32_t lane; local 313 for (lane = 1; lane < lt_settings->link_settings.lane_count; lane++) { 314 if (lane_settings[lane].VOLTAGE_SWING > max_requested.VOLTAGE_SWING) 315 max_requested.VOLTAGE_SWING = lane_settings[lane].VOLTAGE_SWING; 317 if (lane_settings[lane].PRE_EMPHASIS > max_requested.PRE_EMPHASIS) 318 max_requested.PRE_EMPHASIS = lane_settings[lane].PRE_EMPHASIS; 319 if (lane_settings[lane].FFE_PRESET.settings.level > 322 lane_settings[lane] 355 uint8_t lane = 0; local 461 uint32_t lane; local 477 uint32_t lane; local 491 uint32_t lane; local 502 uint32_t lane; local 522 uint32_t lane; local 567 uint32_t lane; local 644 uint32_t lane; local 685 uint32_t lane; local 815 uint32_t lane; local 1354 uint32_t lane; local [all...] |
/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_cx0_phy_regs.h | 34 #define _XELPDP_PORT_M2P_MSGBUS_CTL(idx, lane) _MMIO(_PICK_EVEN_2RANGES(idx, PORT_TC1, \ 38 _XELPDP_PORT_M2P_MSGBUS_CTL_LN0_USBC2) + (lane) * 4) 39 #define XELPDP_PORT_M2P_MSGBUS_CTL(i915__, port, lane) \ 41 _XELPDP_PORT_M2P_MSGBUS_CTL(__xe2lpd_port_idx(port), lane) : \ 42 _XELPDP_PORT_M2P_MSGBUS_CTL(port, lane)) 54 #define _XELPDP_PORT_P2M_MSGBUS_STATUS(idx, lane) _MMIO(_PICK_EVEN_2RANGES(idx, PORT_TC1, \ 58 _XELPDP_PORT_M2P_MSGBUS_CTL_LN0_USBC2) + (lane) * 4 + 8) 59 #define XELPDP_PORT_P2M_MSGBUS_STATUS(i915__, port, lane) \ 61 _XELPDP_PORT_P2M_MSGBUS_STATUS(__xe2lpd_port_idx(port), lane) : \ 62 _XELPDP_PORT_P2M_MSGBUS_STATUS(port, lane)) [all...] |
H A D | intel_dp_link_training.c | 144 * still taking into account any LTTPR common lane- rate/count limits. 345 int lane) 350 lane = min(lane, crtc_state->lane_count - 1); 351 tx_ffe = drm_dp_get_adjust_tx_ffe_preset(link_status, lane); 353 for (lane = 0; lane < crtc_state->lane_count; lane++) 354 tx_ffe = max(tx_ffe, drm_dp_get_adjust_tx_ffe_preset(link_status, lane)); 365 int lane) 341 intel_dp_get_lane_adjust_tx_ffe_preset(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, enum drm_dp_phy dp_phy, const u8 link_status[DP_LINK_STATUS_SIZE], int lane) argument 361 intel_dp_get_lane_adjust_vswing_preemph(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, enum drm_dp_phy dp_phy, const u8 link_status[DP_LINK_STATUS_SIZE], int lane) argument 397 intel_dp_get_lane_adjust_train(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, enum drm_dp_phy dp_phy, const u8 link_status[DP_LINK_STATUS_SIZE], int lane) argument 440 int lane; local 639 int lane; local 757 int lane; local [all...] |
/linux-master/drivers/net/dsa/mv88e6xxx/ |
H A D | serdes.c | 37 int lane, int device, int reg, u16 *val) 39 return mv88e6xxx_phy_read_c45(chip, lane, device, reg, val); 244 int lane = -ENODEV; local 251 lane = MV88E6341_PORT5_LANE; 255 return lane; 261 int lane = -ENODEV; local 268 lane = MV88E6390_PORT9_LANE0; 274 lane = MV88E6390_PORT10_LANE0; 278 return lane; 286 int lane local 36 mv88e6390_serdes_read(struct mv88e6xxx_chip *chip, int lane, int device, int reg, u16 *val) argument 362 int lane = -ENODEV; local 414 mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane, struct mv88e6390_serdes_hw_stat *stat) argument 436 int lane; local 495 int lane; local [all...] |
/linux-master/drivers/phy/tegra/ |
H A D | xusb.h | 55 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, 63 to_usb3_lane(struct tegra_xusb_lane *lane) argument 65 return container_of(lane, struct tegra_xusb_usb3_lane, base); 76 to_usb2_lane(struct tegra_xusb_lane *lane) argument 78 return container_of(lane, struct tegra_xusb_usb2_lane, base); 86 to_ulpi_lane(struct tegra_xusb_lane *lane) argument 88 return container_of(lane, struct tegra_xusb_ulpi_lane, base); 105 to_hsic_lane(struct tegra_xusb_lane *lane) argument 107 return container_of(lane, struct tegra_xusb_hsic_lane, base); 115 to_pcie_lane(struct tegra_xusb_lane *lane) argument 125 to_sata_lane(struct tegra_xusb_lane *lane) argument 279 struct tegra_xusb_lane *lane; member in struct:tegra_xusb_port [all...] |
H A D | xusb.c | 115 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, argument 118 struct device *dev = &lane->pad->dev; 126 err = match_string(lane->soc->funcs, lane->soc->num_funcs, function); 128 dev_err(dev, "invalid function \"%s\" for lane \"%pOFn\"\n", 133 lane->function = err; 141 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 143 lane->pad->ops->remove(lane); 191 struct phy *lane; local 208 struct tegra_xusb_lane *lane; local 320 tegra_xusb_lane_program(struct tegra_xusb_lane *lane) argument 348 struct tegra_xusb_lane *lane; local 391 tegra_xusb_lane_check(struct tegra_xusb_lane *lane, const char *function) argument 403 struct tegra_xusb_lane *lane, *hit = ERR_PTR(-ENODEV); local 426 struct tegra_xusb_lane *lane, *match = ERR_PTR(-ENODEV); local 662 struct tegra_xusb_lane *lane; local 1395 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1406 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1417 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1428 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1439 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1471 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1483 struct tegra_xusb_lane *lane; local 1499 struct tegra_xusb_lane *lane; local 1536 struct tegra_xusb_lane *lane; local [all...] |
H A D | xusb-tegra124.c | 292 struct tegra_xusb_lane *lane; local 300 lane = port->base.lane; 302 if (lane->pad == padctl->pcie) 303 offset = XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL6(lane->index); 452 static void tegra124_usb2_lane_remove(struct tegra_xusb_lane *lane) argument 454 struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); 466 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 468 return tegra124_xusb_padctl_enable(lane->pad->padctl); 473 struct tegra_xusb_lane *lane local 480 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 569 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 701 tegra124_ulpi_lane_remove(struct tegra_xusb_lane *lane) argument 715 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 722 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 837 tegra124_hsic_lane_remove(struct tegra_xusb_lane *lane) argument 851 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 858 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 865 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 935 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1057 tegra124_pcie_lane_remove(struct tegra_xusb_lane *lane) argument 1071 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1078 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1085 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1126 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1235 tegra124_sata_lane_remove(struct tegra_xusb_lane *lane) argument 1249 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1256 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1263 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1308 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1480 struct tegra_xusb_lane *lane = usb3->base.lane; local [all...] |
H A D | xusb-tegra210.c | 447 static int tegra210_usb3_lane_map(struct tegra_xusb_lane *lane) argument 452 if (map->index == lane->index && 453 strcmp(map->type, lane->pad->soc->name) == 0) { 454 dev_dbg(lane->pad->padctl->dev, "lane = %s map to port = usb3-%d\n", 455 lane->pad->soc->lanes[lane->index].name, map->port); 706 struct tegra_xusb_lane *lane = tegra_xusb_find_lane(padctl, "sata", 0); local 716 if (IS_ERR(lane)) 722 usb = tegra_xusb_lane_check(lane, "usb 1058 tegra210_usb3_enable_phy_sleepwalk(struct tegra_xusb_lane *lane, enum usb_device_speed speed) argument 1090 tegra210_usb3_disable_phy_sleepwalk(struct tegra_xusb_lane *lane) argument 1119 tegra210_usb3_enable_phy_wake(struct tegra_xusb_lane *lane) argument 1150 tegra210_usb3_disable_phy_wake(struct tegra_xusb_lane *lane) argument 1181 tegra210_usb3_phy_remote_wake_detected(struct tegra_xusb_lane *lane) argument 1197 tegra210_utmi_enable_phy_wake(struct tegra_xusb_lane *lane) argument 1222 tegra210_utmi_disable_phy_wake(struct tegra_xusb_lane *lane) argument 1247 tegra210_utmi_phy_remote_wake_detected(struct tegra_xusb_lane *lane) argument 1261 tegra210_hsic_enable_phy_wake(struct tegra_xusb_lane *lane) argument 1286 tegra210_hsic_disable_phy_wake(struct tegra_xusb_lane *lane) argument 1311 tegra210_hsic_phy_remote_wake_detected(struct tegra_xusb_lane *lane) argument 1335 tegra210_pmc_utmi_enable_phy_sleepwalk(struct tegra_xusb_lane *lane, enum usb_device_speed speed) argument 1508 tegra210_pmc_utmi_disable_phy_sleepwalk(struct tegra_xusb_lane *lane) argument 1556 tegra210_pmc_hsic_enable_phy_sleepwalk(struct tegra_xusb_lane *lane, enum usb_device_speed speed) argument 1658 tegra210_pmc_hsic_disable_phy_sleepwalk(struct tegra_xusb_lane *lane) argument 1699 struct tegra_xusb_lane *lane; local 1781 tegra210_usb2_lane_remove(struct tegra_xusb_lane *lane) argument 1800 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1835 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1916 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1954 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2114 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2277 tegra210_hsic_lane_remove(struct tegra_xusb_lane *lane) argument 2296 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2317 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2402 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2496 tegra210_uphy_lane_iddq_enable(struct tegra_xusb_lane *lane) argument 2515 tegra210_uphy_lane_iddq_disable(struct tegra_xusb_lane *lane) argument 2563 tegra210_lane_to_usb3_port(struct tegra_xusb_lane *lane) argument 2580 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2653 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2710 tegra210_pcie_lane_remove(struct tegra_xusb_lane *lane) argument 2731 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2745 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2760 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2880 tegra210_sata_lane_remove(struct tegra_xusb_lane *lane) argument 2901 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2914 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 2929 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 3089 struct tegra_xusb_lane *lane; local 3204 struct tegra_xusb_lane *lane; local [all...] |
H A D | xusb-tegra186.c | 321 static void tegra186_usb2_lane_remove(struct tegra_xusb_lane *lane) argument 323 struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); 328 static int tegra186_utmi_enable_phy_sleepwalk(struct tegra_xusb_lane *lane, argument 331 struct tegra_xusb_padctl *padctl = lane->pad->padctl; 333 unsigned int index = lane->index; 477 static int tegra186_utmi_disable_phy_sleepwalk(struct tegra_xusb_lane *lane) argument 479 struct tegra_xusb_padctl *padctl = lane->pad->padctl; 481 unsigned int index = lane->index; 525 static int tegra186_utmi_enable_phy_wake(struct tegra_xusb_lane *lane) argument 527 struct tegra_xusb_padctl *padctl = lane 550 tegra186_utmi_disable_phy_wake(struct tegra_xusb_lane *lane) argument 575 tegra186_utmi_phy_remote_wake_detected(struct tegra_xusb_lane *lane) argument 698 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 731 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 809 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 847 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 925 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 952 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1097 tegra186_usb3_lane_remove(struct tegra_xusb_lane *lane) argument 1104 tegra186_usb3_enable_phy_sleepwalk(struct tegra_xusb_lane *lane, enum usb_device_speed speed) argument 1130 tegra186_usb3_disable_phy_sleepwalk(struct tegra_xusb_lane *lane) argument 1153 tegra186_usb3_enable_phy_wake(struct tegra_xusb_lane *lane) argument 1178 tegra186_usb3_disable_phy_wake(struct tegra_xusb_lane *lane) argument 1203 tegra186_usb3_phy_remote_wake_detected(struct tegra_xusb_lane *lane) argument 1250 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local 1319 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); local [all...] |
/linux-master/drivers/phy/ |
H A D | phy-xgene.c | 268 /* PHY lane CSR accessing from SDS indirectly */ 520 u32 speed[MAX_LANE]; /* Index for override parameter per lane */ 658 static void serdes_wr(struct xgene_phy_ctx *ctx, int lane, u32 reg, u32 data) argument 664 reg += lane * SERDES_LANE_STRIDE; 673 static void serdes_rd(struct xgene_phy_ctx *ctx, int lane, u32 reg, u32 *data) argument 678 reg += lane * SERDES_LANE_STRIDE; 684 static void serdes_clrbits(struct xgene_phy_ctx *ctx, int lane, u32 reg, argument 689 serdes_rd(ctx, lane, reg, &val); 691 serdes_wr(ctx, lane, reg, val); 694 static void serdes_setbits(struct xgene_phy_ctx *ctx, int lane, u3 argument 944 int lane; local 1344 xgene_phy_force_lat_summer_cal(struct xgene_phy_ctx *ctx, int lane) argument 1410 xgene_phy_reset_rxd(struct xgene_phy_ctx *ctx, int lane) argument 1424 xgene_phy_gen_avg_val(struct xgene_phy_ctx *ctx, int lane) argument [all...] |
/linux-master/sound/soc/tegra/ |
H A D | tegra186_asrc.c | 109 if (asrc->lane[id].ratio_source != 116 asrc->lane[id].int_part); 121 asrc->lane[id].frac_part); 173 asrc->lane[id].input_thresh); 196 asrc->lane[id].output_thresh); 206 if (asrc->lane[id].hwcomp_disable) { 225 1, asrc->lane[id].ratio_source); 227 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_SW) { 230 asrc->lane[id].int_part); 233 asrc->lane[i [all...] |
/linux-master/drivers/gpu/drm/bridge/analogix/ |
H A D | analogix_dp_core.c | 239 int pre_emphasis, int lane) 241 switch (lane) { 262 int lane, lane_count, pll_tries, retval; local 269 for (lane = 0; lane < lane_count; lane++) 270 dp->link_train.cr_loop[lane] = 0; 290 for (lane = 0; lane < lane_count; lane 238 analogix_dp_set_lane_lane_pre_emphasis(struct analogix_dp_device *dp, int pre_emphasis, int lane) argument 328 analogix_dp_get_lane_status(u8 link_status[2], int lane) argument 338 int lane; local 352 int lane; local 369 analogix_dp_get_adjust_request_voltage(u8 adjust_request[2], int lane) argument 377 analogix_dp_get_adjust_request_pre_emphasis( u8 adjust_request[2], int lane) argument 387 analogix_dp_set_lane_link_training(struct analogix_dp_device *dp, u8 training_lane_set, int lane) argument 409 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, int lane) argument 446 int lane, lane_count; local 469 int lane, lane_count, retval; local 541 int lane, lane_count, retval; local [all...] |
/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/ |
H A D | csi_rx_public.h | 49 * @param[in] lane The lane ID. 54 const u32 lane,
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/linux-master/drivers/phy/mediatek/ |
H A D | phy-mtk-pcie.c | 36 * struct mtk_pcie_lane_efuse - eFuse data for each lane 40 * @lane_efuse_supported: software eFuse data is supported for this lane 51 * @num_lanes: supported lane numbers 67 * @efuse: pointer to eFuse data for each lane 81 unsigned int lane) 83 struct mtk_pcie_lane_efuse *data = &pcie_phy->efuse[lane]; 90 lane * PEXTP_ANA_LANE_OFFSET; 134 unsigned int lane) 136 struct mtk_pcie_lane_efuse *efuse = &pcie_phy->efuse[lane]; 141 snprintf(efuse_id, sizeof(efuse_id), "tx_ln%d_pmos", lane); 80 mtk_pcie_efuse_set_lane(struct mtk_pcie_phy *pcie_phy, unsigned int lane) argument 133 mtk_pcie_efuse_read_for_lane(struct mtk_pcie_phy *pcie_phy, unsigned int lane) argument [all...] |
/linux-master/drivers/phy/rockchip/ |
H A D | phy-rockchip-typec.c | 505 static void tcphy_tx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane) argument 507 writel(0x7799, tcphy->base + TX_PSC_A0(lane)); 508 writel(0x7798, tcphy->base + TX_PSC_A1(lane)); 509 writel(0x5098, tcphy->base + TX_PSC_A2(lane)); 510 writel(0x5098, tcphy->base + TX_PSC_A3(lane)); 511 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_000(lane)); 512 writel(0xbf, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane)); 515 static void tcphy_rx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane) argument 517 writel(0xa6fd, tcphy->base + RX_PSC_A0(lane)); 518 writel(0xa6fd, tcphy->base + RX_PSC_A1(lane)); 529 tcphy_dp_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane) argument [all...] |
/linux-master/drivers/ata/ |
H A D | sata_highbank.c | 259 u8 lane = port_data[sata_port].lane_mapping; local 263 tmp = combo_phy_read(sata_port, CPHY_RX_INPUT_STS + lane * SPHY_LANE); 265 combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp); 270 u8 lane = port_data[sata_port].lane_mapping; local 276 tmp = combo_phy_read(sata_port, CPHY_TX_INPUT_STS + lane * SPHY_LANE); 278 combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp); 281 combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp); 284 combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp); 289 u8 lane = port_data[sata_port].lane_mapping; local 291 tmp = combo_phy_read(sata_port, CPHY_RX_INPUT_STS + lane * SPHY_LAN 313 u8 lane = port_data[sata_port].lane_mapping; local [all...] |
/linux-master/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi_phy.c | 37 u8 lane, pol; local 59 lane = dx / 2; 61 phy->lane_function[lane] = i / 2; 62 phy->lane_polarity[lane] = pol;
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