/linux-master/include/linux/ |
H A D | dns_resolver.h | 32 bool invalidate);
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/linux-master/arch/arm/mm/ |
H A D | cache-v4wt.S | 44 * Unconditionally clean and invalidate the entire icache. 48 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 63 * Clean and invalidate the entire cache. 70 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 71 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 77 * Clean and invalidate a range of cache entries in the specified 89 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry 91 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry 122 1: mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry 140 mcr p15, 0, r2, c7, c5, 0 @ invalidate [all...] |
H A D | cache-v6.S | 42 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache 43 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache 44 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache 45 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache 51 mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache 66 mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate 68 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate 73 mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate 145 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate 150 mcr p15, 0, r0, c7, c5, 6 @ invalidate BT [all...] |
H A D | cache-fa.S | 40 * Unconditionally clean and invalidate the entire icache. 44 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 51 * Clean and invalidate all cache entries in a particular address 59 * Clean and invalidate the entire cache. 65 mcr p15, 0, ip, c7, c14, 0 @ clean/invalidate D cache 67 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 68 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB 90 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I line 91 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry 96 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BT [all...] |
H A D | tlb-v6.S | 32 * - the "Invalidate single entry" instruction will invalidate 48 mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA (was 1) 50 mcrne p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA (was 1) 52 mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate MVA (was 1) 77 mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA 78 mcr p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA 80 mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate MVA
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H A D | tlb-v4wb.S | 38 mcrne p15, 0, r3, c8, c5, 0 @ invalidate I TLB 41 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry 61 mcr p15, 0, r3, c8, c5, 0 @ invalidate I TLB 62 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
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H A D | tlb-v4wbi.S | 40 mcrne p15, 0, r0, c8, c5, 1 @ invalidate I TLB entry 41 mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry 52 1: mcr p15, 0, r0, c8, c5, 1 @ invalidate I TLB entry 53 mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
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H A D | tlb-v7.S | 31 * - the "Invalidate single entry" instruction will invalidate 49 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) 51 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) 53 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA 78 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) 80 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) 82 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA
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H A D | proc-mohawk.S | 62 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 64 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 88 * Unconditionally clean and invalidate the entire icache. 92 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 99 * Clean and invalidate all cache entries in a particular 108 * Clean and invalidate the entire cache. 114 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache 116 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 123 * Clean and invalidate a range of cache entries in the 138 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate [all...] |
H A D | proc-arm920.S | 77 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 80 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 104 * Unconditionally clean and invalidate the entire icache. 108 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 124 * Clean and invalidate the entire cache. 132 2: mcr p15, 0, r3, c7, c14, 2 @ clean+invalidate D index 138 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 158 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 160 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry 194 mcr p15, 0, r0, c7, c5, 1 @ invalidate [all...] |
H A D | proc-fa526.S | 58 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 61 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 104 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 106 mcr p15, 0, ip, c7, c14, 0 @ clean and invalidate whole D cache 108 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache 109 mcr p15, 0, ip, c7, c5, 6 @ invalidate BTB since mm changed 113 mcr p15, 0, ip, c8, c7, 0 @ invalidate UTLB 137 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 140 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 142 mcr p15, 0, r0, c7, c5, 5 @ invalidate IScratchpa [all...] |
H A D | proc-arm926.S | 26 * using the single invalidate entry instructions. Anything larger 69 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 72 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 105 * Unconditionally clean and invalidate the entire icache. 109 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 116 * Clean and invalidate all cache entries in a particular 125 * Clean and invalidate the entire cache. 132 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 134 1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test,clean,invalidate 138 mcrne p15, 0, ip, c7, c5, 0 @ invalidate [all...] |
H A D | proc-arm925.S | 109 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 112 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 139 * Unconditionally clean and invalidate the entire icache. 143 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 150 * Clean and invalidate all cache entries in a particular 159 * Clean and invalidate the entire cache. 166 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 170 2: mcr p15, 0, r3, c7, c14, 2 @ clean+invalidate D index 175 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 182 * Clean and invalidate [all...] |
H A D | proc-arm922.S | 79 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 82 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 106 * Unconditionally clean and invalidate the entire icache. 110 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 117 * Clean and invalidate all cache entries in a particular 126 * Clean and invalidate the entire cache. 134 2: mcr p15, 0, r3, c7, c14, 2 @ clean+invalidate D index 140 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 147 * Clean and invalidate a range of cache entries in the 160 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate [all...] |
H A D | proc-arm946.S | 79 * Unconditionally clean and invalidate the entire icache. 83 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 96 * Clean and invalidate the entire cache. 121 * Clean and invalidate a range of cache entries in the 137 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry 138 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry 140 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry 141 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry 144 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry 145 mcrne p15, 0, r0, c7, c5, 1 @ invalidate [all...] |
H A D | proc-arm1026.S | 25 * using the single invalidate entry instructions. Anything larger 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 88 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 113 * Unconditionally clean and invalidate the entire icache. 118 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 134 * Clean and invalidate the entire cache. 141 1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test, clean, invalidate 146 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 168 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 175 mcrne p15, 0, ip, c7, c5, 0 @ invalidate [all...] |
H A D | proc-arm1022.S | 25 * using the single invalidate entry instructions. Anything larger 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 88 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 113 * Unconditionally clean and invalidate the entire icache. 118 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 134 * Clean and invalidate the entire cache. 143 2: mcr p15, 0, r3, c7, c14, 2 @ clean+invalidate D index 151 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 173 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 180 mcrne p15, 0, ip, c7, c5, 0 @ invalidate [all...] |
H A D | proc-arm1020e.S | 25 * using the single invalidate entry instructions. Anything larger 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 88 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 113 * Unconditionally clean and invalidate the entire icache. 118 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 134 * Clean and invalidate the entire cache. 144 2: mcr p15, 0, r3, c7, c14, 2 @ clean+invalidate D index 152 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 174 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 181 mcrne p15, 0, ip, c7, c5, 0 @ invalidate [all...] |
H A D | proc-xsc3.S | 68 1: mcr p15, 0, \rd, c7, c14, 2 @ clean/invalidate L1 D line 113 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB 118 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs 145 * Unconditionally clean and invalidate the entire icache. 149 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 165 * Clean and invalidate the entire cache. 173 mcrne p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB 196 mcrne p15, 0, r0, c7, c5, 1 @ invalidate L1 I line 197 mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line 202 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BT [all...] |
H A D | cache-v4wb.S | 54 * Unconditionally clean and invalidate the entire icache. 58 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 65 * Clean and invalidate all cache entries in a particular address 73 * Clean and invalidate the entire cache. 77 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache 111 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache 117 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry 164 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry 169 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 191 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate [all...] |
H A D | tlb-fa.S | 43 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry 56 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry
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/linux-master/drivers/net/ethernet/mellanox/mlx5/core/lib/ |
H A D | hv_vhca.h | 43 void (*invalidate)(struct mlx5_hv_vhca_agent*, 84 void (*invalidate)(struct mlx5_hv_vhca_agent*,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/ |
H A D | gk104.c | 49 .invalidate = gf100_ltc_invalidate,
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H A D | gm200.c | 56 .invalidate = gf100_ltc_invalidate,
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H A D | gp102.c | 46 .invalidate = gf100_ltc_invalidate,
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