Searched refs:intr (Results 1 - 25 of 528) sorted by relevance

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/linux-master/drivers/gpu/drm/nouveau/nvkm/core/
H A Dintr.c22 #include <core/intr.h>
29 nvkm_intr_xlat(struct nvkm_subdev *subdev, struct nvkm_intr *intr, argument
36 const struct nvkm_intr_data *data = intr->data;
42 if (tdev->intr >= 0 &&
45 if (data->mask & BIT(tdev->intr)) {
47 *mask = BIT(tdev->intr);
65 if (type < intr->leaves * sizeof(*intr->stat) * 8) {
78 struct nvkm_intr *intr; local
81 list_for_each_entry(intr,
91 nvkm_intr_allow_locked(struct nvkm_intr *intr, int leaf, u32 mask) argument
105 struct nvkm_intr *intr; local
120 nvkm_intr_block_locked(struct nvkm_intr *intr, int leaf, u32 mask) argument
131 struct nvkm_intr *intr; local
148 struct nvkm_intr *intr; local
157 struct nvkm_intr *intr; local
167 struct nvkm_intr *intr; local
197 struct nvkm_intr *intr = inth->intr; local
232 nvkm_intr_add(const struct nvkm_intr_func *func, const struct nvkm_intr_data *data, struct nvkm_subdev *subdev, int leaves, struct nvkm_intr *intr) argument
270 nvkm_intr_subdev_add_dev(struct nvkm_intr *intr, enum nvkm_subdev_type type, int inst) argument
293 nvkm_intr_subdev_add(struct nvkm_intr *intr) argument
318 struct nvkm_intr *intr; local
369 struct nvkm_intr *intr, *intt; local
406 struct nvkm_intr *intr = inth->intr; local
421 nvkm_inth_add(struct nvkm_intr *intr, enum nvkm_intr_type type, enum nvkm_intr_prio prio, struct nvkm_subdev *subdev, nvkm_inth_func func, struct nvkm_inth *inth) argument
[all...]
/linux-master/drivers/scsi/fnic/
H A Dvnic_intr.c15 void vnic_intr_free(struct vnic_intr *intr) argument
17 intr->ctrl = NULL;
20 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, argument
23 intr->index = index;
24 intr->vdev = vdev;
26 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);
27 if (!intr->ctrl) {
36 void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, argument
39 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer);
40 iowrite32(coalescing_type, &intr
45 vnic_intr_clean(struct vnic_intr *intr) argument
[all...]
H A Dvnic_intr.h56 static inline void vnic_intr_unmask(struct vnic_intr *intr) argument
58 iowrite32(0, &intr->ctrl->mask);
61 static inline void vnic_intr_mask(struct vnic_intr *intr) argument
63 iowrite32(1, &intr->ctrl->mask);
66 static inline void vnic_intr_return_credits(struct vnic_intr *intr, argument
76 iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
79 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) argument
81 return ioread32(&intr->ctrl->int_credits);
84 static inline void vnic_intr_return_all_credits(struct vnic_intr *intr) argument
86 unsigned int credits = vnic_intr_credits(intr);
[all...]
/linux-master/drivers/scsi/snic/
H A Dvnic_intr.c12 void svnic_intr_free(struct vnic_intr *intr) argument
14 intr->ctrl = NULL;
17 int svnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, argument
20 intr->index = index;
21 intr->vdev = vdev;
23 intr->ctrl = svnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);
24 if (!intr->ctrl) {
33 void svnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, argument
36 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer);
37 iowrite32(coalescing_type, &intr
42 svnic_intr_clean(struct vnic_intr *intr) argument
[all...]
H A Dvnic_intr.h40 svnic_intr_unmask(struct vnic_intr *intr) argument
42 iowrite32(0, &intr->ctrl->mask);
46 svnic_intr_mask(struct vnic_intr *intr) argument
48 iowrite32(1, &intr->ctrl->mask);
52 svnic_intr_return_credits(struct vnic_intr *intr, argument
64 iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
68 svnic_intr_credits(struct vnic_intr *intr) argument
70 return ioread32(&intr->ctrl->int_credits);
74 svnic_intr_return_all_credits(struct vnic_intr *intr) argument
76 unsigned int credits = svnic_intr_credits(intr);
[all...]
/linux-master/drivers/net/ethernet/cisco/enic/
H A Dvnic_intr.c17 void vnic_intr_free(struct vnic_intr *intr) argument
19 intr->ctrl = NULL;
22 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, argument
25 intr->index = index;
26 intr->vdev = vdev;
28 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);
29 if (!intr->ctrl) {
38 void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer, argument
41 vnic_intr_coalescing_timer_set(intr, coalescing_timer);
42 iowrite32(coalescing_type, &intr
47 vnic_intr_coalescing_timer_set(struct vnic_intr *intr, u32 coalescing_timer) argument
54 vnic_intr_clean(struct vnic_intr *intr) argument
[all...]
H A Dvnic_intr.h41 static inline void vnic_intr_unmask(struct vnic_intr *intr) argument
43 iowrite32(0, &intr->ctrl->mask);
46 static inline void vnic_intr_mask(struct vnic_intr *intr) argument
48 iowrite32(1, &intr->ctrl->mask);
51 static inline int vnic_intr_masked(struct vnic_intr *intr) argument
53 return ioread32(&intr->ctrl->mask);
56 static inline void vnic_intr_return_credits(struct vnic_intr *intr, argument
66 iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
69 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) argument
71 return ioread32(&intr
74 vnic_intr_return_all_credits(struct vnic_intr *intr) argument
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/vfn/
H A Dtu102.c29 tu102_vfn_intr_reset(struct nvkm_intr *intr, int leaf, u32 mask) argument
31 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);
37 tu102_vfn_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask) argument
39 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);
45 tu102_vfn_intr_block(struct nvkm_intr *intr, int leaf, u32 mask) argument
47 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr);
53 tu102_vfn_intr_rearm(struct nvkm_intr *intr) argument
61 tu102_vfn_intr_unarm(struct nvkm_intr *intr) argument
69 tu102_vfn_intr_pending(struct nvkm_intr *intr) argument
[all...]
H A Dbase.c50 if (vfn->func->intr) {
51 ret = nvkm_intr_add(vfn->func->intr, vfn->func->intrs,
52 &vfn->subdev, 8, &vfn->intr);
H A Dr535.c42 rm->intr = hw->intr;
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
H A Dgp100.c48 gp100_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask) argument
50 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
56 gp100_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask) argument
58 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
64 gp100_mc_intr_rearm(struct nvkm_intr *intr) argument
68 for (i = 0; i < intr->leaves; i++)
69 intr->func->allow(intr,
73 gp100_mc_intr_unarm(struct nvkm_intr *intr) argument
[all...]
H A Dnv04.c72 nv04_mc_intr_rearm(struct nvkm_intr *intr) argument
74 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
77 for (leaf = 0; leaf < intr->leaves; leaf++)
82 nv04_mc_intr_unarm(struct nvkm_intr *intr) argument
84 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
87 for (leaf = 0; leaf < intr->leaves; leaf++)
94 nv04_mc_intr_pending(struct nvkm_intr *intr) argument
96 struct nvkm_mc *mc = container_of(intr, typeo
[all...]
H A Dgt215.c57 gt215_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask) argument
59 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
65 gt215_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask) argument
67 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
84 .intr = &nv04_mc_intr,
/linux-master/drivers/irqchip/
H A Dirq-ti-sci-intr.c62 struct ti_sci_intr_irq_domain *intr = domain->host_data; local
68 *type = intr->type;
75 * @intr: IRQ domain corresponding to Interrupt Router
80 static int ti_sci_intr_xlate_irq(struct ti_sci_intr_irq_domain *intr, u32 irq) argument
82 struct device_node *np = dev_of_node(intr->dev);
111 struct ti_sci_intr_irq_domain *intr = domain->host_data; local
118 intr->sci->ops.rm_irq_ops.free_irq(intr->sci,
119 intr->ti_sci_id, data->hwirq,
120 intr
137 struct ti_sci_intr_irq_domain *intr = domain->host_data; local
227 struct ti_sci_intr_irq_domain *intr; local
[all...]
H A Dirq-mips-gic.c69 static void gic_clear_pcpu_masks(unsigned int intr) argument
75 clear_bit(intr, per_cpu_ptr(pcpu_masks, i));
78 static bool gic_local_irq_is_routable(int intr) argument
87 switch (intr) {
153 unsigned int intr; local
169 for_each_set_bit(intr, pending, gic_shared_intrs) {
172 GIC_SHARED_TO_HWIRQ(intr));
175 GIC_SHARED_TO_HWIRQ(intr));
181 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); local
183 write_gic_rmask(intr);
189 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); local
313 unsigned int intr; local
332 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); local
339 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); local
354 int intr, cpu; local
372 int intr, cpu; local
399 unsigned int intr = local_intrs[i]; local
434 int intr = GIC_HWIRQ_TO_SHARED(hw); local
473 unsigned int intr; local
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ce/
H A Dgk104.c65 u32 intr = nvkm_rd32(device, 0x104908 + base) & mask; local
66 if (intr & 0x00000001) {
69 intr &= ~0x00000001;
71 if (intr & 0x00000002) {
74 intr &= ~0x00000002;
76 if (intr & 0x00000004) {
79 intr &= ~0x00000004;
81 if (intr) {
82 nvkm_warn(subdev, "intr %08x\n", intr);
[all...]
H A Dgp100.c66 u32 intr = nvkm_rd32(device, 0x104410 + base) & mask; local
67 if (intr & 0x00000001) { //XXX: guess
70 intr &= ~0x00000001;
72 if (intr & 0x00000002) { //XXX: guess
75 intr &= ~0x00000002;
77 if (intr & 0x00000004) {
80 intr &= ~0x00000004;
82 if (intr) {
83 nvkm_warn(subdev, "intr %08x\n", intr);
[all...]
/linux-master/arch/mips/include/asm/
H A Dmips-gic.h49 static inline void __iomem *addr_gic_##name(unsigned int intr) \
51 return mips_gic_base + (off) + (intr * (stride)); \
54 static inline unsigned int read_gic_##name(unsigned int intr) \
57 return __raw_readl(addr_gic_##name(intr)); \
64 static inline void write_gic_##name(unsigned int intr, \
68 __raw_writel(val, addr_gic_##name(intr)); \
92 static inline unsigned int read_gic_##name(unsigned int intr) \
98 addr += (intr / 64) * sizeof(uint64_t); \
99 val = __raw_readq(addr) >> intr % 64; \
101 addr += (intr / 3
329 mips_gic_vx_map_reg(enum mips_gic_local_interrupt intr) argument
[all...]
/linux-master/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dcore.c16 u32 intr; local
18 intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
19 mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
24 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
26 intr &= dev->mt76.mmio.irqmask;
28 if (intr & MT_INT_MAC_IRQ3) {
39 if (intr & MT_INT_TX_DONE_ALL) {
44 if (intr & MT_INT_RX_DONE(0)) {
50 if (intr & MT_INT_RX_DONE(1)) {
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_interrupts.c209 static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_hw_intr *intr, argument
212 return &intr->irq_tbl[irq_idx - 1];
241 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local
249 if (!intr)
252 spin_lock_irqsave(&intr->irq_lock, irq_flags);
254 if (!test_bit(reg_idx, &intr->irq_mask))
258 irq_status = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].status_off);
261 enable_mask = DPU_REG_READ(&intr->hw, intr
299 dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr, unsigned int irq_idx) argument
355 dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr, unsigned int irq_idx) argument
409 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local
427 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local
446 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local
481 struct dpu_hw_intr *intr; local
[all...]
/linux-master/drivers/net/ethernet/intel/idpf/
H A Didpf_dev.c56 struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg; local
59 intr->dyn_ctl = idpf_get_reg_addr(adapter, dyn_ctl);
60 intr->dyn_ctl_intena_m = PF_GLINT_DYN_CTL_INTENA_M;
61 intr->dyn_ctl_itridx_m = PF_GLINT_DYN_CTL_ITR_INDX_M;
62 intr->icr_ena = idpf_get_reg_addr(adapter, PF_INT_DIR_OICR_ENA);
63 intr->icr_ena_ctlq_m = PF_INT_DIR_OICR_ENA_M;
94 struct idpf_intr_reg *intr = &q_vector->intr_reg; local
97 intr->dyn_ctl = idpf_get_reg_addr(adapter,
99 intr->dyn_ctl_intena_m = PF_GLINT_DYN_CTL_INTENA_M;
100 intr
[all...]
H A Didpf_vf_dev.c56 struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg; local
59 intr->dyn_ctl = idpf_get_reg_addr(adapter, dyn_ctl);
60 intr->dyn_ctl_intena_m = VF_INT_DYN_CTL0_INTENA_M;
61 intr->dyn_ctl_itridx_m = VF_INT_DYN_CTL0_ITR_INDX_M;
62 intr->icr_ena = idpf_get_reg_addr(adapter, VF_INT_ICR0_ENA1);
63 intr->icr_ena_ctlq_m = VF_INT_ICR0_ENA1_ADMINQ_M;
94 struct idpf_intr_reg *intr = &q_vector->intr_reg; local
97 intr->dyn_ctl = idpf_get_reg_addr(adapter,
99 intr->dyn_ctl_intena_m = VF_INT_DYN_CTLN_INTENA_M;
100 intr
[all...]
/linux-master/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pic.c134 static struct mpc52xx_intr __iomem *intr; variable in typeref:struct:__iomem
162 io_be_clrbit(&intr->ctrl, 11 - l2irq);
168 io_be_setbit(&intr->ctrl, 11 - l2irq);
174 io_be_setbit(&intr->ctrl, 27-l2irq);
195 ctrl_reg = in_be32(&intr->ctrl);
198 out_be32(&intr->ctrl, ctrl_reg);
224 io_be_setbit(&intr->main_mask, 16 - l2irq);
230 io_be_clrbit(&intr->main_mask, 16 - l2irq);
247 io_be_setbit(&intr->per_mask, 31 - l2irq);
253 io_be_clrbit(&intr
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fault/
H A Dgp10b.c37 .intr = gp100_fault_intr,
44 .buffer.intr = gp100_fault_buffer_intr,
/linux-master/drivers/usb/mtu3/
H A Dmtu3_trace.h36 TP_PROTO(u32 intr),
37 TP_ARGS(intr),
39 __field(u32, intr)
42 __entry->intr = intr;
44 TP_printk("(%08x) %s %s %s %s %s %s", __entry->intr,
45 __entry->intr & HOT_RST_INTR ? "HOT_RST" : "",
46 __entry->intr & WARM_RST_INTR ? "WARM_RST" : "",
47 __entry->intr & ENTER_U3_INTR ? "ENT_U3" : "",
48 __entry->intr
[all...]

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