Searched refs:intel_set_pch_fifo_underrun_reporting (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_fifo_underrun.h19 bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
H A Dintel_fifo_underrun.c336 * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
349 bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, function
455 if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
H A Dintel_crt.c248 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
277 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
289 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
334 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
H A Dg4x_hdmi.c411 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
430 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
H A Dg4x_dp.c450 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
465 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
H A Dintel_display.c1530 intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
1583 intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
1792 intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
1811 intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
6644 intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, true);
H A Dintel_sdvo.c1866 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1877 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
H A Dintel_dp.c5252 intel_set_pch_fifo_underrun_reporting(dev_priv,
5282 intel_set_pch_fifo_underrun_reporting(dev_priv,

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