Searched refs:icr0 (Results 1 - 2 of 2) sorted by relevance
| /linux-master/arch/mips/include/asm/octeon/ | ||
| H A D | cvmx-iob-defs.h | 83 uint64_t icr0:1; member in struct:cvmx_iob_bist_status::cvmx_iob_bist_status_cn30xx 117 uint64_t icr0:1; 131 uint64_t icr0:1; member in struct:cvmx_iob_bist_status::cvmx_iob_bist_status_cn61xx 165 uint64_t icr0:1; 184 uint64_t icr0:1; member in struct:cvmx_iob_bist_status::cvmx_iob_bist_status_cn68xx 208 uint64_t icr0:1; |
| /linux-master/drivers/net/ethernet/intel/i40e/ | ||
| H A D | i40e_main.c | 4055 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 4068 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 4301 u32 icr0, icr0_remaining; local 4304 icr0 = rd32(hw, I40E_PFINT_ICR0); 4308 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) 4312 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || 4313 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) 4317 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { 4324 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { 4338 if (icr0 [all...] |
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