Searched refs:hubbub (Results 1 - 25 of 48) sorted by relevance

12

/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddchubbub.h129 struct hubbub *hubbub,
133 struct hubbub *hubbub,
136 struct hubbub *hubbub,
140 bool (*get_dcc_compression_cap)(struct hubbub *hubbub,
154 void (*wm_read_state)(struct hubbub *hubbub,
206 struct hubbub { struct
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_hubbub.c54 struct hubbub *hubbub,
59 struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
62 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower))
65 if (hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower))
73 hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);
91 void hubbub201_construct(struct dcn20_hubbub *hubbub, argument
97 hubbub->base.ctx = ctx;
99 hubbub
53 hubbub201_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
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H A Ddcn201_hubbub.h39 void hubbub201_construct(struct dcn20_hubbub *hubbub,
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hubbub.h32 #define TO_DCN20_HUBBUB(hubbub)\
33 container_of(hubbub, struct dcn20_hubbub, base)
83 struct hubbub base;
101 void hubbub2_construct(struct dcn20_hubbub *hubbub,
117 bool hubbub2_get_dcc_compression_cap(struct hubbub *hubbub,
121 bool hubbub2_initialize_vmids(struct hubbub *hubbub,
125 int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbub,
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H A Ddcn20_hubbub.c217 bool hubbub2_get_dcc_compression_cap(struct hubbub *hubbub, argument
221 struct dc *dc = hubbub->ctx->dc;
233 if (!hubbub->funcs->dcc_support_pixel_format(input->format,
237 if (!hubbub->funcs->dcc_support_swizzle(input->swizzle_mode, bpe,
241 hubbub2_det_request_size(TO_DCN20_HUBBUB(hubbub)->detile_buf_size,
357 void hubbub2_init_vm_ctx(struct hubbub *hubbub, argument
361 struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
373 int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbu argument
410 hubbub2_update_dchub(struct hubbub *hubbub, struct dchub_init_data *dh_data) argument
485 hubbub2_wm_read_state(struct hubbub *hubbub, struct dcn_hubbub_wm *wm) argument
539 hubbub2_get_dchub_ref_freq(struct hubbub *hubbub, unsigned int dccg_ref_freq_inKhz, unsigned int *dchub_ref_freq_inKhz) argument
571 hubbub2_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
608 hubbub2_read_state(struct hubbub *hubbub, struct dcn_hubbub_state *hubbub_state) argument
654 hubbub2_construct(struct dcn20_hubbub *hubbub, struct dc_context *ctx, const struct dcn_hubbub_registers *hubbub_regs, const struct dcn_hubbub_shift *hubbub_shift, const struct dcn_hubbub_mask *hubbub_mask) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_hubbub.h120 struct hubbub *hubbub,
126 struct hubbub *hubbub,
132 struct hubbub *hubbub,
138 struct hubbub *hubbub,
143 void hubbub32_force_usr_retraining_allow(struct hubbub *hubbub, boo
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H A Ddcn32_hubbub.c50 static void dcn32_init_crb(struct hubbub *hubbub) argument
52 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
75 void hubbub32_set_request_limit(struct hubbub *hubbub, int memory_channel_count, int words_per_channel) argument
77 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
92 void dcn32_program_det_size(struct hubbub *hubbub, int hubp_inst, unsigned int det_buffer_size_in_kbyte) argument
94 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
131 static void dcn32_program_compbuf_size(struct hubbub *hubbu argument
168 hubbub32_program_urgent_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
358 hubbub32_program_stutter_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
504 hubbub32_program_pstate_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
657 hubbub32_program_usr_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
737 hubbub32_force_usr_retraining_allow(struct hubbub *hubbub, bool allow) argument
751 hubbub32_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
797 hubbub32_init_watermarks(struct hubbub *hubbub) argument
848 hubbub32_wm_read_state(struct hubbub *hubbub, struct dcn_hubbub_wm *wm) argument
937 hubbub32_force_wm_propagate_to_pipes(struct hubbub *hubbub) argument
948 hubbub32_get_mall_en(struct hubbub *hubbub, unsigned int *mall_in_use) argument
959 hubbub32_init(struct hubbub *hubbub) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hubbub.h110 int hubbub3_init_dchub_sys_ctx(struct hubbub *hubbub,
119 void hubbub3_force_wm_propagate_to_pipes(struct hubbub *hubbub);
121 bool hubbub3_get_dcc_compression_cap(struct hubbub *hubbub,
126 struct hubbub *hubbub,
131 void hubbub3_force_pstate_change_control(struct hubbub *hubbub,
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H A Ddcn30_hubbub.c64 int hubbub3_init_dchub_sys_ctx(struct hubbub *hubbub, argument
67 struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
97 struct hubbub *hubbub,
102 struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
105 if (hubbub21_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower))
108 if (hubbub21_program_stutter_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower))
111 if (hubbub21_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower))
132 hubbub1_allow_self_refresh_control(hubbub, !hubbu
96 hubbub3_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
275 hubbub3_get_dcc_compression_cap(struct hubbub *hubbub, const struct dc_dcc_surface_param *input, struct dc_surface_dcc_cap *output) argument
375 hubbub3_force_wm_propagate_to_pipes(struct hubbub *hubbub) argument
387 hubbub3_force_pstate_change_control(struct hubbub *hubbub, bool force, bool allow) argument
398 hubbub3_init_watermarks(struct hubbub *hubbub) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hubbub.h32 #define TO_DCN10_HUBBUB(hubbub)\
33 container_of(hubbub, struct dcn10_hubbub, base)
407 struct hubbub base;
416 struct hubbub *hubbub,
420 struct hubbub *hubbub);
422 void hubbub1_wm_change_req_wa(struct hubbub *hubbub);
425 struct hubbub *hubbu
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H A Ddcn10_hubbub.c42 void hubbub1_wm_read_state(struct hubbub *hubbub, argument
45 struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);
91 void hubbub1_allow_self_refresh_control(struct hubbub *hubbub, bool allow) argument
93 struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);
104 bool hubbub1_is_allow_self_refresh_enabled(struct hubbub *hubbub) argument
106 struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);
117 struct hubbub *hubbu
116 hubbub1_verify_allow_pstate_change_high( struct hubbub *hubbub) argument
234 hubbub1_wm_change_req_wa(struct hubbub *hubbub) argument
243 hubbub1_program_urgent_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
357 hubbub1_program_stutter_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
502 hubbub1_program_pstate_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
583 hubbub1_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
619 hubbub1_update_dchub( struct hubbub *hubbub, struct dchub_init_data *dh_data) argument
682 hubbub1_toggle_watermark_change_req(struct hubbub *hubbub) argument
700 hubbub1_soft_reset(struct hubbub *hubbub, bool reset) argument
843 hubbub1_get_dcc_compression_cap(struct hubbub *hubbub, const struct dc_dcc_surface_param *input, struct dc_surface_dcc_cap *output) argument
944 hubbub1_construct(struct hubbub *hubbub, struct dc_context *ctx, const struct dcn_hubbub_registers *hubbub_regs, const struct dcn_hubbub_shift *hubbub_shift, const struct dcn_hubbub_mask *hubbub_mask) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_hubbub.h125 void dcn21_dchvm_init(struct hubbub *hubbub);
126 int hubbub21_init_dchub(struct hubbub *hubbub,
129 struct hubbub *hubbub,
134 struct hubbub *hubbub,
139 struct hubbub *hubbub,
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H A Ddcn21_hubbub.c67 void dcn21_dchvm_init(struct hubbub *hubbub) argument
69 struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
103 hubbub->riommu_active = true;
107 int hubbub21_init_dchub(struct hubbub *hubbub, argument
110 struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
136 dcn21_dchvm_init(hubbub);
142 struct hubbub *hubbub,
141 hubbub21_program_urgent_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
335 hubbub21_program_stutter_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
488 hubbub21_program_pstate_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
574 hubbub21_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
618 hubbub21_wm_read_state(struct hubbub *hubbub, struct dcn_hubbub_wm *wm) argument
683 hubbub21_apply_DEDCN21_147_wa(struct hubbub *hubbub) argument
707 hubbub21_construct(struct dcn20_hubbub *hubbub, struct dc_context *ctx, const struct dcn_hubbub_registers *hubbub_regs, const struct dcn_hubbub_shift *hubbub_shift, const struct dcn_hubbub_mask *hubbub_mask) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/
H A Ddcn35_hubbub.c49 static void dcn35_init_crb(struct hubbub *hubbub) argument
51 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
74 static void dcn35_program_compbuf_size(struct hubbub *hubbub, unsigned int compbuf_size_kb, bool safe_to_increase) argument
76 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
113 struct hubbub *hubbub,
118 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
258 static void hubbub35_get_dchub_ref_freq(struct hubbub *hubbu argument
112 hubbub35_program_stutter_z8_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
298 hubbub35_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
337 hubbub35_init_watermarks(struct hubbub *hubbub) argument
399 hubbub35_wm_read_state(struct hubbub *hubbub, struct dcn_hubbub_wm *wm) argument
516 hubbub35_init(struct hubbub *hubbub) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hubbub.c51 static void dcn31_init_crb(struct hubbub *hubbub) argument
53 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
76 static void dcn31_program_det_size(struct hubbub *hubbub, int hubp_inst, unsigned int det_buffer_size_in_kbyte) argument
78 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
112 static void dcn31_wait_for_det_apply(struct hubbub *hubbub, int hubp_inst) argument
114 struct dcn20_hubbub *hubbub2 = TO_DCN20_HUBBUB(hubbub);
134 static void dcn31_program_compbuf_size(struct hubbub *hubbu argument
173 hubbub31_program_urgent_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
363 hubbub31_program_stutter_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
636 hubbub31_program_pstate_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
718 hubbub31_program_watermarks( struct hubbub *hubbub, struct dcn_watermark_set *watermarks, unsigned int refclk_mhz, bool safe_to_lower) argument
803 hubbub31_get_dcc_compression_cap(struct hubbub *hubbub, const struct dc_dcc_surface_param *input, struct dc_surface_dcc_cap *output) argument
902 hubbub31_init_dchub_sys_ctx(struct hubbub *hubbub, struct dcn_hubbub_phys_addr_config *pa_config) argument
938 hubbub31_get_dchub_ref_freq(struct hubbub *hubbub, unsigned int dccg_ref_freq_inKhz, unsigned int *dchub_ref_freq_inKhz) argument
975 hubbub31_verify_allow_pstate_change_high(struct hubbub *hubbub) argument
1034 hubbub31_init(struct hubbub *hubbub) argument
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H A Ddcn31_hubbub.h133 int hubbub31_init_dchub_sys_ctx(struct hubbub *hubbub,
136 void hubbub31_init(struct hubbub *hubbub);
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c135 if (res_pool->dccg && res_pool->hubbub) {
141 (res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,
212 if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)
213 dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
214 !dc->res_pool->hubbub->ctx->dc->debug.disable_stutter);
256 if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)
257 dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c191 if (res_pool->dccg && res_pool->hubbub) {
197 (res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,
238 if (res_pool->hubbub->funcs->dchubbub_init)
239 res_pool->hubbub->funcs->dchubbub_init(dc->res_pool->hubbub);
270 if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)
271 dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
272 !dc->res_pool->hubbub
679 struct hubbub *hubbub = dc->res_pool->hubbub; local
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c664 if (res_pool->dccg && res_pool->hubbub) {
670 (res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,
716 if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)
717 dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
718 !dc->res_pool->hubbub->ctx->dc->debug.disable_stutter);
788 if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)
789 dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c151 dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm);
870 if (dc->res_pool->hubbub->funcs->is_allow_self_refresh_enabled)
872 dc->res_pool->hubbub->funcs->is_allow_self_refresh_enabled(dc->res_pool->hubbub);
892 if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)
894 dc->res_pool->hubbub->funcs->is_allow_self_refresh_enabled(dc->res_pool->hubbub))
895 dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
1212 struct hubbub *hubbub = dc->res_pool->hubbub; local
1367 struct hubbub *hubbub = dc->res_pool->hubbub; local
3118 struct hubbub *hubbub = dc->res_pool->hubbub; local
3156 struct hubbub *hubbub = dc->res_pool->hubbub; local
3406 struct hubbub *hubbub = dc->res_pool->hubbub; local
3416 struct hubbub *hubbub = hws->ctx->dc->res_pool->hubbub; local
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/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn201/
H A Ddcn201_resource.c740 static struct hubbub *dcn201_hubbub_create(struct dc_context *ctx)
742 struct dcn20_hubbub *hubbub = kzalloc(sizeof(struct dcn20_hubbub), local
745 if (!hubbub)
748 hubbub201_construct(hubbub, ctx,
753 return &hubbub->base;
924 if (pool->base.hubbub != NULL) {
925 kfree(pool->base.hubbub);
926 pool->base.hubbub = NULL;
1028 return dc->res_pool->hubbub->funcs->get_dcc_compression_cap(
1029 dc->res_pool->hubbub,
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c1916 if (dc->res_pool->hubbub->funcs->force_wm_propagate_to_pipes)
1917 dc->res_pool->hubbub->funcs->force_wm_propagate_to_pipes(dc->res_pool->hubbub);
1920 if (dc->res_pool->hubbub->funcs->program_det_size && pipe_ctx->update_flags.bits.det_size)
1921 dc->res_pool->hubbub->funcs->program_det_size(
1922 dc->res_pool->hubbub, pipe_ctx->plane_res.hubp->inst, pipe_ctx->det_buffer_size_kb);
2029 if (dc->res_pool->hubbub->funcs->force_pstate_change_control)
2030 dc->res_pool->hubbub->funcs->force_pstate_change_control(
2031 dc->res_pool->hubbub, true, false);
2075 struct hubbub *hubbu local
2249 struct hubbub *hubbub = dc->res_pool->hubbub; local
2300 struct hubbub *hubbub = dc->res_pool->hubbub; local
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c785 if (res_pool->dccg && res_pool->hubbub) {
790 (res_pool->hubbub->funcs->get_dchub_ref_freq)(res_pool->hubbub,
847 if (dc->res_pool->hubbub->funcs->allow_self_refresh_control)
848 dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
849 !dc->res_pool->hubbub->ctx->dc->debug.disable_stutter);
934 if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)
935 dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c700 if (pool->base.hubbub != NULL) {
701 kfree(pool->base.hubbub);
702 pool->base.hubbub = NULL;
1022 static struct hubbub *dcn21_hubbub_create(struct dc_context *ctx)
1026 struct dcn20_hubbub *hubbub = kzalloc(sizeof(struct dcn20_hubbub), local
1029 if (!hubbub)
1032 hubbub21_construct(hubbub, ctx,
1038 struct dcn20_vmid *vmid = &hubbub->vmid[i];
1046 hubbub->num_vmid = res_cap_rn.num_vmid;
1048 return &hubbub
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.h112 struct hubbub *dcn20_hubbub_create(struct dc_context *ctx);

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