Searched refs:hsub (Results 1 - 7 of 7) sorted by path
| /freebsd-11-stable/sys/arm/nvidia/drm2/ |
| H A D | tegra_fb.c | 273 int hsub, vsub, i; local
280 hsub = drm_format_horz_chroma_subsampling(cmd->pixel_format);
288 width /= hsub;
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| /freebsd-11-stable/sys/dev/drm2/ |
| H A D | drm_crtc.c | 2265 int ret, hsub, vsub, num_planes, i; local
2273 hsub = drm_format_horz_chroma_subsampling(r->pixel_format);
2277 if (r->width == 0 || r->width % hsub) {
2288 unsigned int width = r->width / (i != 0 ? hsub : 1);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CalcSpillWeights.cpp | 54 unsigned sub, hsub; local
59 hsub = mi->getOperand(1).getSubReg();
63 hsub = mi->getOperand(0).getSubReg();
70 return sub == hsub ? hreg : Register();
73 Register CopiedPReg = (hsub ? tri.getSubReg(hreg, hsub) : hreg);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2733 DAG.getTargetConstant(AArch64::hsub, DL, MVT::i32)),
5127 setVecVal(AArch64::hsub);
5146 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, VT, Sel);
12808 DAG.getTargetConstant(AArch64::hsub, DL, MVT::i32)),
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| H A D | AArch64InstrInfo.cpp | 2735 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub,
2737 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub,
2743 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub,
2745 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub,
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| H A D | AArch64InstructionSelector.cpp | 404 SubReg = AArch64::hsub;
757 .addImm(AArch64::hsub);
2795 return BuildFn(AArch64::hsub);
2882 ExtractSubReg = AArch64::hsub;
3226 SubregIdx = AArch64::hsub;
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| H A D | AArch64RegisterInfo.cpp | 106 if (RC == &AArch64::GPR32allRegClass && Idx == AArch64::hsub)
108 else if (RC == &AArch64::GPR64allRegClass && Idx == AArch64::hsub)
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