Searched refs:hs_clk (Results 1 - 3 of 3) sorted by last modified time

/linux-master/drivers/gpu/drm/mediatek/
H A Dmtk_dsi.c205 struct clk *hs_clk; member in struct:mtk_dsi
611 ret = clk_set_rate(dsi->hs_clk, dsi->data_rate);
1122 dsi->hs_clk = devm_clk_get(dev, "hs");
1123 if (IS_ERR(dsi->hs_clk))
1124 return dev_err_probe(dev, PTR_ERR(dsi->hs_clk), "Failed to get hs clock\n");
/linux-master/drivers/gpu/drm/bridge/
H A Dsamsung-dsim.c702 unsigned long hs_clk, byte_clk, esc_clk, pix_clk; local
713 hs_clk = samsung_dsim_set_pll(dsi, dsi->burst_clk_rate);
715 hs_clk = samsung_dsim_set_pll(dsi, DIV_ROUND_UP(pix_clk * bpp, dsi->lanes));
717 if (!hs_clk) {
722 byte_clk = hs_clk / 8;
731 dev_dbg(dsi->dev, "hs_clk = %lu, byte_clk = %lu, esc_clk = %lu\n",
732 hs_clk, byte_clk, esc_clk);
/linux-master/drivers/gpu/drm/mcde/
H A Dmcde_dsi.c47 struct clk *hs_clk; member in struct:mcde_dsi
776 hs_freq = clk_get_rate(d->hs_clk);
883 d->hs_freq = clk_round_rate(d->hs_clk, hs_freq);
884 ret = clk_set_rate(d->hs_clk, d->hs_freq);
896 ret = clk_prepare_enable(d->hs_clk);
1046 clk_disable_unprepare(d->hs_clk);
1091 d->hs_clk = devm_clk_get(dev, "hs");
1092 if (IS_ERR(d->hs_clk)) {
1094 return PTR_ERR(d->hs_clk);

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