Searched refs:hdmi_phy_write (Results 1 - 6 of 6) sorted by relevance
/linux-master/drivers/gpu/drm/msm/hdmi/ |
H A D | hdmi_phy_8x60.c | 15 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG0, 20 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG1, 24 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG1, 30 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2, 40 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2, 49 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG2, 57 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG3, 61 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG9, 0); 66 hdmi_phy_write(phy, REG_HDMI_8x60_PHY_REG12, 71 hdmi_phy_write(ph [all...] |
H A D | hdmi_phy_8x74.c | 12 hdmi_phy_write(phy, REG_HDMI_8x74_ANA_CFG0, 0x1b); 13 hdmi_phy_write(phy, REG_HDMI_8x74_ANA_CFG1, 0xf2); 14 hdmi_phy_write(phy, REG_HDMI_8x74_BIST_CFG0, 0x0); 15 hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN0, 0x0); 16 hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN1, 0x0); 17 hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN2, 0x0); 18 hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN3, 0x0); 19 hdmi_phy_write(phy, REG_HDMI_8x74_PD_CTRL1, 0x20); 24 hdmi_phy_write(phy, REG_HDMI_8x74_PD_CTRL0, 0x7f);
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H A D | hdmi_phy_8960.c | 14 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x00); 15 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG0, 0x1b); 16 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG1, 0xf2); 17 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG4, 0x00); 18 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG5, 0x00); 19 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG6, 0x00); 20 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG7, 0x00); 21 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG8, 0x00); 22 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG9, 0x00); 23 hdmi_phy_write(ph [all...] |
H A D | hdmi_pll_8960.c | 279 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val); 288 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val); 289 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x3f); 293 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val); 302 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x80); 347 hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG12, val);
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H A D | hdmi_phy_8996.c | 413 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x0); 419 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1); 421 hdmi_phy_write(phy, REG_HDMI_8996_PHY_TX0_TX1_LANE_CTL, 0x0F); 422 hdmi_phy_write(phy, REG_HDMI_8996_PHY_TX2_TX3_LANE_CTL, 0x0F); 531 hdmi_phy_write(phy, REG_HDMI_8996_PHY_MODE, cfg.phy_mode); 532 hdmi_phy_write(phy, REG_HDMI_8996_PHY_PD_CTL, 0x1F); 598 hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x1); 601 hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x19); 625 hdmi_phy_write(phy, REG_HDMI_8996_PHY_CFG, 0x18); 627 hdmi_phy_write(ph [all...] |
H A D | hdmi.h | 167 static inline void hdmi_phy_write(struct hdmi_phy *phy, u32 reg, u32 data) function
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