Searched refs:ext_clock (Results 1 - 7 of 7) sorted by relevance
| /linux-master/drivers/media/i2c/ |
| H A D | aptina-pll.c | 27 pll->ext_clock, pll->pix_clock);
29 if (pll->ext_clock < limits->ext_clock_min ||
30 pll->ext_clock > limits->ext_clock_max) {
41 div = gcd(pll->pix_clock, pll->ext_clock);
43 div = pll->ext_clock / div;
57 (pll->ext_clock / limits->n_min * pll->m));
61 (pll->ext_clock / limits->n_max * pll->m));
80 * 4. the internal clock frequency, given by ext_clock / n, is in the
82 * 5. the output clock frequency, given by ext_clock / n * m, is in the
103 * ext_clock / (di
[all...] |
| H A D | aptina-pll.h | 12 unsigned int ext_clock; member in struct:aptina_pll
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| H A D | mt9p031.c | 261 mt9p031->pll.ext_clock = ext_freq;
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| /linux-master/drivers/media/i2c/et8ek8/ |
| H A D | et8ek8_mode.c | 47 .ext_clock = 9600000,
148 .ext_clock = 9600000,
204 .ext_clock = 9600000,
260 .ext_clock = 9600000,
316 .ext_clock = 9600000,
372 .ext_clock = 9600000,
427 .ext_clock = 9600000,
483 .ext_clock = 9600000,
539 .ext_clock = 9600000,
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| H A D | et8ek8_reg.h | 40 u32 ext_clock; /* in Hz */ member in struct:et8ek8_mode
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| H A D | et8ek8_driver.c | 829 xclk_freq = sensor->current_reglist->mode.ext_clock;
1088 if (sensor->current_reglist->mode.ext_clock != reglist->mode.ext_clock)
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| /linux-master/drivers/comedi/drivers/ |
| H A D | cb_pcidas64.c | 1168 struct ext_clock_info ext_clock; member in struct:pcidas64_private
1936 devpriv->ext_clock.divisor = divisor;
1937 devpriv->ext_clock.chanspec = data[2];
2303 divisor = devpriv->ext_clock.divisor;
2323 int chanspec = devpriv->ext_clock.chanspec;
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