Searched refs:enable_fbc (Results 1 - 8 of 8) sorted by path

/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Dcompressor.h67 void (*enable_fbc)(struct compressor *cp, member in struct:compressor_funcs
/linux-master/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_compressor.c427 .enable_fbc = dce110_compressor_enable_fbc,
/linux-master/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c134 compr->funcs->enable_fbc(compr, &params);
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c2091 static void enable_fbc(
2111 compr->funcs->enable_fbc(compr, &params);
2381 enable_fbc(dc, dc->current_state);
2903 enable_fbc(dc, context);
2104 static void enable_fbc( function
/linux-master/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c3002 dev_priv->display.params.enable_fbc && !merged->fbc_wm_enabled) {
H A Dintel_display_params.c103 intel_display_param_named_unsafe(enable_fbc, int, 0400,
H A Dintel_display_params.h46 param(int, enable_fbc, -1, 0600) \
H A Dintel_fbc.c1227 if (!i915->display.params.enable_fbc) {
1800 * i915.enable_fbc, so sanitize it by translating the default value into either
1805 * relies on being able to change i915.enable_fbc at runtime.
1809 if (i915->display.params.enable_fbc >= 0)
1810 return !!i915->display.params.enable_fbc;
1882 i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915);
1883 drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
1884 i915->display.params.enable_fbc);

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