Searched refs:dmb (Results 1 - 25 of 37) sorted by relevance

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/linux-master/arch/arm64/include/asm/vdso/
H A Dcompat_barrier.h17 #ifdef dmb
18 #undef dmb macro
21 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") macro
23 #define aarch32_smp_mb() dmb(ish)
24 #define aarch32_smp_rmb() dmb(ishld)
25 #define aarch32_smp_wmb() dmb(ishst)
/linux-master/tools/virtio/asm/
H A Dbarrier.h20 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro
22 #define virt_rmb() dmb(ishld)
23 #define virt_wmb() dmb(ishst)
24 #define virt_store_mb(var, value) do { WRITE_ONCE(var, value); dmb(ish); } while (0)
/linux-master/arch/arm/include/asm/
H A Dbarrier.h21 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") macro
33 #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ macro
40 #define dmb(x) __asm__ __volatile__ ("" : : : "memory") macro
45 #define dmb(x) __asm__ __volatile__ ("" : : : "memory") macro
67 #define dma_rmb() dmb(osh)
68 #define dma_wmb() dmb(oshst)
77 #define __smp_mb() dmb(ish)
79 #define __smp_wmb() dmb(ishst)
H A Dassembler.h388 ALT_SMP(dmb ish)
390 ALT_SMP(W(dmb) ish)
393 ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb
/linux-master/arch/arm64/include/asm/
H A Dbarrier.h26 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro
57 #define __dma_mb() dmb(osh)
58 #define __dma_rmb() dmb(oshld)
59 #define __dma_wmb() dmb(oshst)
116 #define __smp_mb() dmb(ish)
117 #define __smp_rmb() dmb(ishld)
118 #define __smp_wmb() dmb(ishst)
H A Datomic_ll_sc.h102 ATOMIC_OP_RETURN( , dmb ish, , l, "memory", __VA_ARGS__)\
106 ATOMIC_FETCH_OP ( , dmb ish, , l, "memory", __VA_ARGS__)\
117 ATOMIC_FETCH_OP ( , dmb ish, , l, "memory", __VA_ARGS__)\
201 ATOMIC64_OP_RETURN(, dmb ish, , l, "memory", __VA_ARGS__) \
205 ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \
216 ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \
250 " dmb ish\n"
311 __CMPXCHG_CASE(w, b, mb_, 8, dmb ish, , l, "memory", K)
312 __CMPXCHG_CASE(w, h, mb_, 16, dmb ish, , l, "memory", K)
313 __CMPXCHG_CASE(w, , mb_, 32, dmb is
[all...]
H A Dcmpxchg.h18 * barrier case is generated as release+dmb for the former and
57 __XCHG_CASE(w, b, mb_, 8, dmb ish, nop, , a, l, "memory")
58 __XCHG_CASE(w, h, mb_, 16, dmb ish, nop, , a, l, "memory")
59 __XCHG_CASE(w, , mb_, 32, dmb ish, nop, , a, l, "memory")
60 __XCHG_CASE( , , mb_, 64, dmb ish, nop, , a, l, "memory")
/linux-master/net/smc/
H A Dsmc_ism.c162 struct smcd_dmb dmb; local
168 memset(&dmb, 0, sizeof(dmb));
169 dmb.dmb_tok = dmb_desc->token;
170 dmb.sba_idx = dmb_desc->sba_idx;
171 dmb.cpu_addr = dmb_desc->cpu_addr;
172 dmb.dma_addr = dmb_desc->dma_addr;
173 dmb.dmb_len = dmb_desc->len;
174 rc = smcd->ops->unregister_dmb(smcd, &dmb);
186 struct smcd_dmb dmb; local
[all...]
/linux-master/drivers/s390/net/
H A Dism_drv.c218 static void ism_free_dmb(struct ism_dev *ism, struct smcd_dmb *dmb) argument
220 clear_bit(dmb->sba_idx, ism->sba_bitmap);
221 dma_free_coherent(&ism->pdev->dev, dmb->dmb_len,
222 dmb->cpu_addr, dmb->dma_addr);
225 static int ism_alloc_dmb(struct ism_dev *ism, struct smcd_dmb *dmb) argument
229 if (PAGE_ALIGN(dmb->dmb_len) > dma_get_max_seg_size(&ism->pdev->dev))
232 if (!dmb->sba_idx) {
238 dmb->sba_idx = bit;
240 if (dmb
253 ism_register_dmb(struct smcd_dev *smcd, struct smcd_dmb *dmb) argument
284 ism_unregister_dmb(struct smcd_dev *smcd, struct smcd_dmb *dmb) argument
[all...]
H A Dism.h116 u64 dmb; member in struct:ism_reg_dmb::__anon3084
207 #define ISM_CREATE_REQ(dmb, idx, sf, offset) \
208 ((dmb) | (idx) << 24 | (sf) << 23 | (offset))
/linux-master/arch/arm/common/
H A Dvlock.S29 dmb
33 dmb
80 dmb
93 dmb
H A Dmcpm_head.S121 dmb
136 dmb
148 dmb
152 dmb
173 dmb
182 dmb
196 dmb
H A Dmcpm_entry.c49 dmb();
65 dmb();
/linux-master/tools/testing/selftests/kvm/include/aarch64/
H A Dprocessor.h119 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro
121 #define dma_wmb() dmb(oshst)
124 #define dma_rmb() dmb(oshld)
/linux-master/include/net/
H A Dsmc.h64 int (*register_dmb)(struct smcd_dev *dev, struct smcd_dmb *dmb);
65 int (*unregister_dmb)(struct smcd_dev *dev, struct smcd_dmb *dmb);
/linux-master/arch/arm64/mm/
H A Dflush.c99 dmb(osh);
/linux-master/arch/arm/mach-socfpga/
H A Dself-refresh.S85 dmb
/linux-master/arch/arm/mach-omap2/
H A Domap-smc.S52 dmb
H A Dsleep34xx.S97 dmb @ data memory barrier
213 dmb
418 dmb @ data memory barrier
429 dmb @ data memory barrier
444 dmb @ data memory barrier
H A Dsleep33xx.S133 dmb
/linux-master/arch/arm/mm/
H A Dcache-b15-rac.c66 dmb();
76 /* This dmb() is required to force the Bus Interface Unit
80 dmb();
/linux-master/arch/arm/mach-tegra/
H A Dsleep.S35 dmb @ ensure ordering
/linux-master/arch/arm/kernel/
H A Dsmp_tlb.c153 dmb();
/linux-master/arch/arm64/kernel/
H A Dhead.S122 dmb sy // needed before dc ivac with
363 dmb sy
640 dmb sy
/linux-master/arch/arm/mach-bcm/
H A Dplatsmp-brcmstb.c67 dmb();

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