Searched refs:dmar_writeq (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/iommu/intel/
H A Dsvm.c70 dmar_writeq(iommu->reg + DMAR_PQH_REG, 0ULL);
71 dmar_writeq(iommu->reg + DMAR_PQT_REG, 0ULL);
72 dmar_writeq(iommu->reg + DMAR_PQA_REG, virt_to_phys(iommu->prq) | PRQ_ORDER);
93 dmar_writeq(iommu->reg + DMAR_PQH_REG, 0ULL);
94 dmar_writeq(iommu->reg + DMAR_PQT_REG, 0ULL);
95 dmar_writeq(iommu->reg + DMAR_PQA_REG, 0ULL);
498 dmar_writeq(iommu->reg + DMAR_PQH_REG, tail);
H A Dperfmon.c433 dmar_writeq(iommu_config_base(iommu_pmu, idx), hwc->config);
532 dmar_writeq(iommu_pmu->overflow, status);
H A Diommu.c1125 dmar_writeq(iommu->reg + DMAR_RTADDR_REG, addr);
1193 dmar_writeq(iommu->reg + DMAR_CCMD_REG, val);
1235 dmar_writeq(iommu->reg + tlb_offset, val_iva);
1236 dmar_writeq(iommu->reg + tlb_offset + 8, val);
4883 dmar_writeq(iommu->reg + DMAR_ECEO_REG, ob);
4884 dmar_writeq(iommu->reg + DMAR_ECMD_REG, ecmd | (oa << DMA_ECMD_OA_SHIFT));
H A Diommu.h153 #define dmar_writeq(a,v) writeq(v,a) macro
H A Dirq_remapping.c476 dmar_writeq(iommu->reg + DMAR_IRTA_REG,
H A Ddmar.c1739 dmar_writeq(iommu->reg + DMAR_IQA_REG, val);

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