| /linux-master/drivers/gpu/drm/nouveau/nvkm/engine/dma/ |
| H A D | usernv04.c | 44 struct nv04_dmaobj *dmaobj = nv04_dmaobj(base); local
45 struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
46 u64 offset = dmaobj->base.start & 0xfffff000;
47 u64 adjust = dmaobj->base.start & 0x00000fff;
48 u32 length = dmaobj->base.limit - dmaobj->base.start;
51 if (dmaobj->clone) {
54 if (!dmaobj->base.start)
65 nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | (adjust << 20));
67 nvkm_wo32(*pgpuobj, 0x08, dmaobj
85 struct nv04_dmaobj *dmaobj; local
[all...] |
| H A D | user.c | 50 struct nvkm_dmaobj *dmaobj = nvkm_dmaobj(base); local
51 return dmaobj->func->bind(dmaobj, gpuobj, align, pgpuobj);
69 struct nvkm_dmaobj *dmaobj)
79 nvkm_object_ctor(&nvkm_dmaobj_func, oclass, &dmaobj->object);
80 dmaobj->func = func;
81 dmaobj->dma = dma;
89 dmaobj->target = args->v0.target;
90 dmaobj->access = args->v0.access;
91 dmaobj
67 nvkm_dmaobj_ctor(const struct nvkm_dmaobj_func *func, struct nvkm_dma *dma, const struct nvkm_oclass *oclass, void **pdata, u32 *psize, struct nvkm_dmaobj *dmaobj) argument
[all...] |
| H A D | usergv100.c | 41 struct gv100_dmaobj *dmaobj = gv100_dmaobj(base); local
42 struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
43 u64 start = dmaobj->base.start >> 8;
44 u64 limit = dmaobj->base.limit >> 8;
50 nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
74 struct gv100_dmaobj *dmaobj; local
78 if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))
80 *pdmaobj = &dmaobj->base;
83 &data, &size, &dmaobj
[all...] |
| H A D | usernv50.c | 44 struct nv50_dmaobj *dmaobj = nv50_dmaobj(base); local
45 struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
51 nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
52 nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit));
53 nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start));
54 nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 |
55 upper_32_bits(dmaobj->base.start));
57 nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5);
77 struct nv50_dmaobj *dmaobj; local
81 if (!(dmaobj
[all...] |
| H A D | usergf100.c | 44 struct gf100_dmaobj *dmaobj = gf100_dmaobj(base); local
45 struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
51 nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
52 nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit));
53 nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start));
54 nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 |
55 upper_32_bits(dmaobj->base.start));
57 nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5);
77 struct gf100_dmaobj *dmaobj; local
81 if (!(dmaobj
[all...] |
| H A D | usergf119.c | 43 struct gf119_dmaobj *dmaobj = gf119_dmaobj(base); local
44 struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;
50 nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);
51 nvkm_wo32(*pgpuobj, 0x04, dmaobj->base.start >> 8);
52 nvkm_wo32(*pgpuobj, 0x08, dmaobj->base.limit >> 8);
75 struct gf119_dmaobj *dmaobj; local
79 if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))
81 *pdmaobj = &dmaobj->base;
84 &data, &size, &dmaobj
[all...] |
| H A D | base.c | 37 struct nvkm_dmaobj *dmaobj = NULL; local
40 ret = dma->func->class_new(dma, oclass, data, size, &dmaobj);
41 if (dmaobj)
42 *pobject = &dmaobj->object;
|
| /linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | chan.c | 351 struct nvkm_dmaobj *dmaobj, u64 offset, u64 length,
363 (!func->ramfc->ctxdma != !dmaobj) ||
369 func->userd->bar < 0, userd, func->ramfc->ctxdma, dmaobj,
436 ret = nvkm_object_bind(&dmaobj->object, chan->inst, -16, &chan->push);
349 nvkm_chan_new_(const struct nvkm_chan_func *func, struct nvkm_runl *runl, int runq, struct nvkm_cgrp *cgrp, const char *name, bool priv, u32 devm, struct nvkm_vmm *vmm, struct nvkm_dmaobj *dmaobj, u64 offset, u64 length, struct nvkm_memory *userd, u64 ouserd, struct nvkm_chan **pchan) argument
|