Searched refs:dm_write_reg_soc15 (Results 1 - 2 of 2) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 261 dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_GSL_WINDOW, tg110->offsets.crtc, 0);
424 dm_write_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset, value);
518 dm_write_reg_soc15(
528 dm_write_reg_soc15(
653 dm_write_reg_soc15(tg->ctx,
675 dm_write_reg_soc15(
742 dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_BLANK_CONTROL,
903 dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, 0);
942 dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value);
955 dm_write_reg_soc15(ct
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/ |
| H A D | dm_services.h | 151 #define dm_write_reg_soc15(ctx, reg, inst_offset, value) \ macro
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