Searched refs:divr1 (Results 1 - 1 of 1) sorted by relevance
| /linux-master/drivers/clk/imx/ |
| H A D | clk-sscg-pll.c | 72 int divr1, divf1; member in struct:clk_sscg_pll_setup
214 do_div(vco1, temp_setup->divr1 + 1);
233 for (temp_setup->divr1 = 0; temp_setup->divr1 <= PLL_DIVR1_MAX;
234 temp_setup->divr1++) {
236 do_div(temp_setup->ref_div1, temp_setup->divr1 + 1);
331 u32 val, divr1, divf1, divr2, divf2, divq; local
335 divr1 = FIELD_GET(PLL_DIVR1_MASK, val);
352 do_div(temp64, (divr1 + 1) * (divr2 + 1) * (divq + 1));
376 val |= FIELD_PREP(PLL_DIVR1_MASK, setup->divr1);
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