/linux-master/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml2_dc_resource_mgmt.h | 35 * dml2_map_dc_pipes - Creates a pipe linkage in dc_state based on current display config. 37 * @state: Current dc_state to be updated. 42 * config, create a pipe linkage in dc_state which is then used by DC core. 48 bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const struct dml_display_cfg_st *disp_cfg, struct dml2_dml_to_dc_pipe_mapping *mapping, const struct dc_state *existing_state);
|
H A D | dml2_mall_phantom.h | 42 unsigned int dml2_helper_calculate_num_ways_for_subvp(struct dml2_context *ctx, struct dc_state *context); 44 bool dml2_svp_add_phantom_pipe_to_dc_state(struct dml2_context *ctx, struct dc_state *state, struct dml_mode_support_info_st *mode_support_info); 46 bool dml2_svp_remove_all_phantom_pipes(struct dml2_context *ctx, struct dc_state *state); 48 bool dml2_svp_validate_static_schedulability(struct dml2_context *ctx, struct dc_state *context, enum dml_dram_clock_change_support pstate_change_type); 50 bool dml2_svp_drr_schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_timing *drr_timing);
|
H A D | dml2_utils.h | 34 struct dc_state; 41 void dml2_copy_clocks_to_dc_state(struct dml2_dcn_clocks *out_clks, struct dc_state *context); 44 bool is_dtbclk_required(const struct dc *dc, struct dc_state *context); 66 void dml2_dc_construct_pipes(struct dc_state *context, struct dml_mode_support_info_st *dml_mode_support_st, 72 * @context : dc_state. 79 bool dml2_predict_pipe_split(struct dc_state *context, display_pipe_params_st pipe, int index); 85 * @context : struct dc_state. 91 enum dc_status dml2_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream); 107 * @context : dc_state provides a handle to selectively populate pipe_ctx 117 void dml2_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *contex [all...] |
H A D | dml2_wrapper.h | 74 bool (*can_support_mclk_switch_using_fw_based_vblank_stretch)(struct dc *dc, struct dc_state *context); 75 bool (*acquire_secondary_pipe_for_mpc_odm)(const struct dc *dc, struct dc_state *state, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm); 77 struct dc_state *new_ctx, 78 const struct dc_state *cur_ctx, 83 struct dc_state *new_ctx, 84 const struct dc_state *cur_ctx, 97 struct dc_state *state, 100 struct dc_state *state, 103 struct dc_state *state, 106 bool (*add_phantom_plane)(const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state *plane_state, struct dc_state *contex [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/ |
H A D | dc_state.h | 32 struct dc_state *dc_state_create(struct dc *dc); 33 void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state); 34 struct dc_state *dc_state_create_copy(struct dc_state *src_state); 35 void dc_state_copy_current(struct dc *dc, struct dc_state *dst_state); 36 struct dc_state *dc_state_create_current_copy(struct dc *dc); 37 void dc_state_construct(struct dc *dc, struct dc_state *state); 38 void dc_state_destruct(struct dc_state *state); 39 void dc_state_retain(struct dc_state *stat [all...] |
H A D | dc_state_priv.h | 29 #include "dc_state.h" 35 enum mall_stream_type dc_state_get_pipe_subvp_type(const struct dc_state *state, 37 enum mall_stream_type dc_state_get_stream_subvp_type(const struct dc_state *state, 41 struct dc_stream_state *dc_state_get_paired_subvp_stream(const struct dc_state *state, 46 struct dc_state *state, 49 struct dc_state *state, 54 struct dc_state *state, 57 struct dc_state *state, 62 struct dc_state *state, 66 struct dc_state *stat [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
H A D | dcn351_fpu.h | 13 struct dc_state *context, 17 void dcn351_decide_zstate_support(struct dc *dc, struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dce112/ |
H A D | dce112_resource.h | 42 struct dc_state *context, 43 struct dc_state *old_context); 47 struct dc_state *context, 52 struct dc_state *new_ctx,
|
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
H A D | dce110_clk_mgr.h | 34 const struct dc_state *context, 40 struct dc_state *context); 42 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce100/ |
H A D | dce100_hwseq.h | 33 struct dc_state; 39 struct dc_state *context); 43 struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
H A D | dcn20_clk_mgr.h | 30 struct dc_state *context, 34 struct dc_state *context, 37 struct dc_state *context, bool safe_to_lower); 49 struct dc_state *context, 54 struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
H A D | dcn21_hwseq.h | 41 struct dc_state *context); 45 struct dc_state *context); 47 void dcn21_PLAT_58856_wa(struct dc_state *context, 56 struct dc_state *context, struct dc_stream_state *stream);
|
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
H A D | dcn32_hwseq.h | 48 void dcn32_commit_subvp_config(struct dc *dc, struct dc_state *context); 66 void dcn32_program_mall_pipe_config(struct dc *dc, struct dc_state *context); 68 void dcn32_update_mall_sel(struct dc *dc, struct dc_state *context); 70 void dcn32_update_force_pstate(struct dc *dc, struct dc_state *context); 72 void dcn32_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx); 78 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context); 81 struct dc_state *context, 99 struct dc_state *context, 109 struct dc_state *context, 112 void dcn32_enable_phantom_streams(struct dc *dc, struct dc_state *contex [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/inc/ |
H A D | link_enc_cfg.h | 40 struct dc_state *state); 45 void link_enc_cfg_copy(const struct dc_state *src_ctx, struct dc_state *dst_ctx); 59 struct dc_state *state, 70 struct dc_state *state, 116 bool link_enc_cfg_validate(struct dc *dc, struct dc_state *state); 123 void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state *new_state);
|
H A D | resource.h | 103 struct dc_state *context, 114 struct dc_state *context); 153 struct dc_state *context, 283 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx, 292 void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx, 302 struct dc_state *new_ctx, 303 struct dc_state *cur_ctx, 314 struct dc_state *context, 334 struct dc_state *new_ctx, 335 const struct dc_state *cur_ct [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | dcn32_fpu.h | 35 struct dc_state *context, 40 struct dc_state *context, 48 struct dc_state *context, 54 void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context, 62 struct dc_state *context, 72 void dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *context, struct dc_stream_state **fpo_candidate_stream); 74 bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, uint32_t vactive_margin_req); 76 void dcn32_override_min_req_memclk(struct dc *dc, struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
H A D | dcn35_fpu.h | 38 struct dc_state *context, 42 void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
H A D | dcn30_resource.h | 50 struct dc_state *context, 59 bool dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context, 63 struct dc_state *context, 70 struct dc *dc, struct dc_state *context, 74 void dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); 79 struct dc *dc, struct dc_state *context, 98 struct dc_state *new_ctx, 103 bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context); 104 void dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context); 105 int dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *contex [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | dcn20_fpu.h | 36 struct dc_state *context, 40 struct dc_state *context, 45 struct dc_state *context, 49 struct dc_state *context, 64 bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, 76 struct dc_state *context, 79 bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, bool
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
H A D | dcn314_fpu.h | 36 int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context,
|
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | dcn31_fpu.h | 37 void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); 38 void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); 41 struct dc *dc, struct dc_state *context, 55 struct dc_state *context,
|
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/ |
H A D | hw_sequencer_private.h | 55 struct dc_state; 77 void (*init_pipes)(struct dc *dc, struct dc_state *context); 78 void (*reset_hw_ctx_wrap)(struct dc *dc, struct dc_state *context); 82 struct dc_state *state, 103 struct dc_state *context, 134 void (*update_odm)(struct dc *dc, struct dc_state *context, 138 struct dc_state *context); 144 struct dc_state *context); 153 void (*PLAT_58856_wa)(struct dc_state *context, 157 struct dc_state *contex [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
H A D | dce_clk_mgr.h | 37 struct dc_state *context); 39 uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
H A D | dcn35_hwseq.h | 34 void dcn35_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx); 56 void dcn35_init_pipes(struct dc *dc, struct dc_state *context); 59 struct dc_state *context); 60 void dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx); 62 void dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context, 64 void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context, 75 struct dc_state *context); 79 struct dc_state *context);
|
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
H A D | dcn20_resource.h | 62 const struct dc_state *cur_ctx, 63 struct dc_state *new_ctx, 66 void dcn20_release_pipe(struct dc_state *context, 119 struct dc_state *context, 122 bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate); 125 struct dc_state *context); 128 struct dc_state *context, 135 bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx); 156 struct dc_state *context, 163 enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *contex [all...] |