Searched refs:content_revision (Results 1 - 17 of 17) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/
H A Damdgpu_reg_state.h49 uint8_t content_revision; member in struct:amdgpu_reg_state_header
H A Dkgd_pp_interface.h453 uint8_t content_revision; member in struct:metrics_table_header
H A Datomfirmware.h236 uint8_t content_revision; //change it when a data table has a structure change, or a hw function has a input/output parameter change member in struct:atom_common_table_header
467 * when format_revision==1 && content_revision==1, then this an info table for atomworks to use during debug session, no structure is associated with it.
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Dsmu_v12_0.c336 switch (header->content_revision) {
373 smu->smu_table.boot_values.content_revision = header->content_revision;
396 (smu->smu_table.boot_values.content_revision >= 2))
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomfwctrl.c280 uint8_t format_revision, content_revision; local
294 content_revision = ((struct atom_common_table_header *)profile)->content_revision;
296 if (format_revision == 4 && content_revision == 1) {
375 } else if (format_revision == 4 && content_revision == 2) {
604 if ((info->format_revision == 3) && (info->content_revision == 2)) {
608 } else if ((info->format_revision == 3) && (info->content_revision == 1)) {
H A Dvega12_hwmgr.c2862 gpu_metrics->common_header.content_revision = 0;
H A Dvega20_hwmgr.c4303 gpu_metrics->common_header.content_revision = 0;
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Daqua_vanjaram.c767 pcie_reg_state->common_header.content_revision = 0;
851 xgmi_reg_state->common_header.content_revision = 0;
924 wafl_reg_state->common_header.content_revision = 0;
1043 usr_reg_state->common_header.content_revision = 0;
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c549 switch (header->content_revision) {
586 smu->smu_table.boot_values.content_revision = header->content_revision;
614 (smu->smu_table.boot_values.content_revision >= 2))
H A Darcturus_ppt.c484 smc_dpm_table->table_header.content_revision);
487 (smc_dpm_table->table_header.content_revision == 6))
H A Dnavi10_ppt.c425 smc_dpm_table->table_header.content_revision);
432 switch (smc_dpm_table->table_header.content_revision) {
447 smc_dpm_table->table_header.content_revision);
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0.c558 switch (header->content_revision) {
607 smu->smu_table.boot_values.content_revision = header->content_revision;
/linux-master/drivers/gpu/drm/amd/pm/swsmu/
H A Dsmu_cmn.c1029 header->content_revision = crev;
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c601 switch (header->content_revision) {
650 smu->smu_table.boot_values.content_revision = header->content_revision;
H A Daldebaran_ppt.c426 smc_dpm_table->table_header.content_revision);
429 (smc_dpm_table->table_header.content_revision == 10))
/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser2.c128 (uint32_t) atom_data_tbl->content_revision & 0x3f;
483 if (header->table_header.content_revision != 1)
672 if (header->table_header.content_revision != 1)
1446 && (lvds->table_header.content_revision >= 1)))
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h301 uint32_t content_revision; member in struct:smu_bios_boot_up_values

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