Searched refs:clock_type (Results 1 - 25 of 66) sorted by relevance

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/linux-master/drivers/staging/sm750fb/
H A Dddk750_chip.h34 enum clock_type { enum
43 enum clock_type clock_type; member in struct:pll_value
H A Dddk750_mode.h36 int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock);
H A Dddk750_mode.c84 if (pll->clock_type == SECONDARY_PLL) {
137 } else if (pll->clock_type == PRIMARY_PLL) {
206 int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock)
211 pll.clock_type = clock;
H A Dddk750_chip.c69 pll.clock_type = MXCLK_PLL;
345 if (pll->clock_type == MXCLK_PLL)
/linux-master/include/uapi/linux/hdlc/
H A Dioctl.h42 unsigned int clock_type; /* internal, external, TX-internal etc. */ member in struct:__anon1687
48 unsigned int clock_type; /* internal, external, TX-internal etc. */ member in struct:__anon1688
/linux-master/drivers/nfc/fdp/
H A Dfdp.h26 u8 clock_type, u32 clock_freq, const u8 *fw_vsc_cfg);
H A Di2c.c218 u8 *clock_type, u32 *clock_freq,
224 r = device_property_read_u8(dev, FDP_DP_CLOCK_TYPE_NAME, clock_type);
227 *clock_type = 0;
268 *clock_type, *clock_freq, *fw_vsc_cfg != NULL ? "yes" : "no");
283 u8 clock_type; local
328 fdp_nci_i2c_read_device_properties(dev, &clock_type, &clock_freq,
334 clock_type, clock_freq, fw_vsc_cfg);
217 fdp_nci_i2c_read_device_properties(struct device *dev, u8 *clock_type, u32 *clock_freq, u8 **fw_vsc_cfg) argument
H A Dfdp.c56 u8 clock_type; member in struct:fdp_nci_info
119 static int fdp_nci_set_clock(struct nci_dev *ndev, u8 clock_type, argument
139 data[8] = clock_type;
547 r = fdp_nci_set_clock(ndev, info->clock_type, info->clock_freq);
701 int tx_tailroom, u8 clock_type, u32 clock_freq,
716 info->clock_type = clock_type;
699 fdp_nci_probe(struct fdp_i2c_phy *phy, const struct nfc_phy_ops *phy_ops, struct nci_dev **ndevp, int tx_headroom, int tx_tailroom, u8 clock_type, u32 clock_freq, const u8 *fw_vsc_cfg) argument
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.h50 enum dc_clock_type clock_type,
/linux-master/tools/testing/selftests/timers/
H A Dinconsistency-check.c94 int consistency_test(int clock_type, unsigned long seconds) argument
102 clock_gettime(clock_type, &list[0]);
114 clock_gettime(clock_type, &list[i]);
/linux-master/sound/pci/pcxhr/
H A Dpcxhr_mix22.h19 enum pcxhr_clock_type clock_type,
H A Dpcxhr.h196 enum pcxhr_clock_type clock_type,
H A Dpcxhr_mix22.c403 enum pcxhr_clock_type clock_type,
410 if (clock_type == HR22_CLOCK_TYPE_AES_SYNC) {
416 } else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) {
425 clock_type);
431 "get_external_clock(%d) = 0 Hz\n", clock_type);
402 hr222_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type, int *sample_rate) argument
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c87 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK;
102 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK;
141 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK;
176 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK;
/linux-master/drivers/net/wan/
H A Dpci200syn.c119 switch (port->settings.clock_type) {
208 if (new_line.clock_type != CLOCK_EXT &&
209 new_line.clock_type != CLOCK_TXFROMRX &&
210 new_line.clock_type != CLOCK_INT &&
211 new_line.clock_type != CLOCK_TXINT)
382 port->settings.clock_type = CLOCK_EXT;
H A Dpc300too.c119 switch (port->settings.clock_type) {
231 if (new_line.clock_type != CLOCK_EXT &&
232 new_line.clock_type != CLOCK_TXFROMRX &&
233 new_line.clock_type != CLOCK_INT &&
234 new_line.clock_type != CLOCK_TXINT)
443 port->settings.clock_type = CLOCK_EXT;
H A Dc101.c146 switch (port->settings.clock_type) {
256 if (new_line.clock_type != CLOCK_EXT &&
257 new_line.clock_type != CLOCK_TXFROMRX &&
258 new_line.clock_type != CLOCK_INT &&
259 new_line.clock_type != CLOCK_TXINT)
369 card->settings.clock_type = CLOCK_EXT;
H A Dn2.c161 switch (port->settings.clock_type) {
267 if (new_line.clock_type != CLOCK_EXT &&
268 new_line.clock_type != CLOCK_TXFROMRX &&
269 new_line.clock_type != CLOCK_INT &&
270 new_line.clock_type != CLOCK_TXINT)
456 port->settings.clock_type = CLOCK_EXT;
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.h155 u8 clock_type,
203 u8 clock_type,
/linux-master/tools/testing/selftests/cgroup/
H A Dtest_cpu.c31 enum hog_clock_type clock_type; member in struct:cpu_hog_func_param
159 if (param->clock_type == CPU_HOG_CLOCK_PROCESS) {
210 .clock_type = CPU_HOG_CLOCK_PROCESS,
310 .clock_type = CPU_HOG_CLOCK_WALL,
472 .clock_type = CPU_HOG_CLOCK_WALL,
595 .clock_type = CPU_HOG_CLOCK_WALL,
655 .clock_type = CPU_HOG_CLOCK_WALL,
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c434 pp_clock_request.clock_type = dc_to_pp_clock_type(clock_for_voltage_req->clk_type);
437 if (!pp_clock_request.clock_type)
605 clock_req.clock_type = amd_pp_dcef_clock;
628 clock_req.clock_type = amd_pp_mem_clock;
666 clock_req.clock_type = amd_pp_disp_clock;
669 clock_req.clock_type = amd_pp_phy_clock;
672 clock_req.clock_type = amd_pp_pixel_clock;
/linux-master/drivers/gpu/drm/amd/include/
H A Ddm_pp_interface.h189 enum amd_pp_clock_type clock_type; member in struct:pp_display_clock_request
/linux-master/include/linux/framer/
H A Dframer.h43 * @clock_type: Framer clock type
48 enum framer_clock_type clock_type; member in struct:framer_config
/linux-master/arch/x86/platform/uv/
H A Dbios_uv.c151 s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second) argument
153 return uv_bios_call(UV_BIOS_FREQ_BASE, clock_type,
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.h183 enum dc_clock_type clock_type,
187 enum dc_clock_type clock_type,

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