| /linux-master/include/linux/platform_data/ |
| H A D | bcm7038_wdt.h | 5 const char *clk_name; member in struct:bcm7038_wdt_platform_data
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| /linux-master/drivers/clk/sunxi/ |
| H A D | clk-a10-codec.c | 17 const char *clk_name = node->name, *parent_name; local
24 of_property_read_string(node, "clock-output-names", &clk_name);
27 clk = clk_register_gate(NULL, clk_name, parent_name,
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| H A D | clk-sun4i-pll3.c | 23 const char *clk_name = node->name, *parent; local
31 of_property_read_string(node, "clock-output-names", &clk_name);
36 pr_err("%s: Could not map the clock registers\n", clk_name);
57 clk = clk_register_composite(NULL, clk_name,
64 pr_err("%s: Couldn't register the clock\n", clk_name);
71 clk_name);
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| H A D | clk-a10-pll2.c | 41 const char *clk_name = node->name, *parent; local
121 SUN4I_A10_PLL2_1X, &clk_name);
122 clks[SUN4I_A10_PLL2_1X] = clk_register_fixed_factor(NULL, clk_name,
136 SUN4I_A10_PLL2_2X, &clk_name);
137 clks[SUN4I_A10_PLL2_2X] = clk_register_fixed_factor(NULL, clk_name,
145 SUN4I_A10_PLL2_4X, &clk_name);
146 clks[SUN4I_A10_PLL2_4X] = clk_register_fixed_factor(NULL, clk_name,
154 SUN4I_A10_PLL2_8X, &clk_name);
155 clks[SUN4I_A10_PLL2_8X] = clk_register_fixed_factor(NULL, clk_name,
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| H A D | clk-a10-mod1.c | 27 const char *clk_name = node->name; local
43 of_property_read_string(node, "clock-output-names", &clk_name);
54 clk = clk_register_composite(NULL, clk_name, parents, i,
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| H A D | clk-a10-hosc.c | 22 const char *clk_name = node->name; local
36 of_property_read_string(node, "clock-output-names", &clk_name);
44 clk = clk_register_composite(NULL, clk_name,
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| H A D | clk-sun6i-apb0.c | 33 const char *clk_name = np->name; local
46 of_property_read_string(np, "clock-output-names", &clk_name);
48 clk = clk_register_divider_table(&pdev->dev, clk_name, clk_parent,
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| H A D | clk-a20-gmac.c | 58 const char *clk_name = node->name; local
62 if (of_property_read_string(node, "clock-output-names", &clk_name))
91 clk = clk_register_composite(NULL, clk_name,
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| H A D | clk-sun8i-apb0.c | 25 const char *clk_name = node->name; local
34 of_property_read_string(node, "clock-output-names", &clk_name);
37 clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg,
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| H A D | clk-sun6i-apb0-gates.c | 41 const char *clk_name; local
76 j, &clk_name);
78 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
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| /linux-master/drivers/clk/ti/ |
| H A D | fixed-factor.c | 31 const char *clk_name = ti_dt_clk_name(node); local
51 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,
57 ti_clk_add_alias(clk, clk_name);
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| /linux-master/arch/m68k/include/asm/ |
| H A D | mcfclk.h | 32 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \
42 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \
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| /linux-master/drivers/clk/zynqmp/ |
| H A D | pll.c | 53 const char *clk_name = clk_hw_get_name(hw); local
60 __func__, clk_name, ret);
76 const char *clk_name = clk_hw_get_name(hw); local
88 __func__, clk_name, ret);
138 const char *clk_name = clk_hw_get_name(hw); local
148 __func__, clk_name, ret);
182 const char *clk_name = clk_hw_get_name(hw); local
200 clk_name);
203 __func__, clk_name, ret);
214 __func__, clk_name, re
228 const char *clk_name = clk_hw_get_name(hw); local
252 const char *clk_name = clk_hw_get_name(hw); local
280 const char *clk_name = clk_hw_get_name(hw); local
[all...] |
| H A D | clk-gate-zynqmp.c | 37 const char *clk_name = clk_hw_get_name(hw); local
45 __func__, clk_name, clk_id, ret);
57 const char *clk_name = clk_hw_get_name(hw); local
65 __func__, clk_name, clk_id, ret);
77 const char *clk_name = clk_hw_get_name(hw); local
84 __func__, clk_name, ret);
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| /linux-master/drivers/mailbox/ |
| H A D | qcom-apcs-ipc-mailbox.c | 29 char *clk_name; member in struct:qcom_apcs_ipc_data
33 .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
37 .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
41 .offset = 8, .clk_name = NULL
45 .offset = 16, .clk_name = "qcom-apcs-msm8996-clk"
49 .offset = 12, .clk_name = NULL
53 .offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
118 if (apcs_data->clk_name) {
120 apcs_data->clk_name,
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| /linux-master/drivers/clk/pxa/ |
| H A D | clk-pxa.h | 19 #define MUX_RO_RATE_RO_OPS(name, clk_name) \
31 return clk_register_composite(NULL, clk_name, \
39 #define RATE_RO_OPS(name, clk_name) \
46 return clk_register_composite(NULL, clk_name, \
54 #define RATE_OPS(name, clk_name) \
63 return clk_register_composite(NULL, clk_name, \
71 #define MUX_OPS(name, clk_name, flags) \
80 return clk_register_composite(NULL, clk_name, \
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| /linux-master/drivers/clk/socfpga/ |
| H A D | clk-pll.c | 79 const char *clk_name = node->name; local
97 of_property_read_string(node, "clock-output-names", &clk_name);
99 init.name = clk_name;
113 pr_err("Could not register clock:%s\n", clk_name);
120 clk_name);
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| H A D | clk-pll-a10.c | 72 const char *clk_name = node->name; local
91 of_property_read_string(node, "clock-output-names", &clk_name);
93 init.name = clk_name;
109 pr_err("Could not register clock:%s\n", clk_name);
116 clk_name);
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| H A D | clk-gate-a10.c | 50 const char *clk_name = node->name; local
86 of_property_read_string(node, "clock-output-names", &clk_name);
88 init.name = clk_name;
99 pr_err("Could not register clock:%s\n", clk_name);
106 clk_name);
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| H A D | clk-periph-a10.c | 66 const char *clk_name = node->name; local
96 of_property_read_string(node, "clock-output-names", &clk_name);
98 init.name = clk_name;
111 pr_err("Could not register clock:%s\n", clk_name);
118 clk_name);
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| H A D | clk-periph.c | 56 const char *clk_name = node->name; local
86 of_property_read_string(node, "clock-output-names", &clk_name);
88 init.name = clk_name;
101 pr_err("Could not register clock:%s\n", clk_name);
108 clk_name);
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| /linux-master/drivers/clk/ |
| H A D | clk-nspire.c | 69 const char *clk_name = node->name; local
81 of_property_read_string(node, "clock-output-names", &clk_name);
84 hw = clk_hw_register_fixed_factor(NULL, clk_name, parent_name, 0,
111 const char *clk_name = node->name; local
122 of_property_read_string(node, "clock-output-names", &clk_name);
124 hw = clk_hw_register_fixed_rate(NULL, clk_name, NULL, 0,
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| H A D | clk-fsl-flexspi.c | 51 const char *clk_name = np->name; local
78 of_property_read_string(np, "clock-output-names", &clk_name);
80 hw = devm_clk_hw_register_divider_table(dev, clk_name, clk_parent, 0,
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| H A D | clk-fixed-mmio.c | 21 const char *clk_name = node->name; local
34 of_property_read_string(node, "clock-output-names", &clk_name);
36 clk = clk_hw_register_fixed_rate(NULL, clk_name, NULL, 0, freq);
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| /linux-master/drivers/regulator/ |
| H A D | raa215300.c | 69 const char *clk_name = NULL; local
112 clk_name = xin_name;
118 clk_name = clkin_name;
121 if (clk_name) {
130 hw = devm_clk_hw_register_fixed_rate(dev, clk_name, NULL, 0, 32768);
134 ret = devm_clk_hw_register_clkdev(dev, hw, clk_name, NULL);
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