/linux-master/tools/testing/selftests/timens/ |
H A D | timens.h | 64 static inline int _settime(clockid_t clk_id, time_t offset) argument 69 if (clk_id == CLOCK_MONOTONIC_COARSE || clk_id == CLOCK_MONOTONIC_RAW) 70 clk_id = CLOCK_MONOTONIC; 72 len = snprintf(buf, sizeof(buf), "%d %ld 0", clk_id, offset); 86 static inline int _gettime(clockid_t clk_id, struct timespec *res, bool raw_syscall) argument 91 if (clock_gettime(clk_id, res)) { 92 pr_perror("clock_gettime(%d)", (int)clk_id); 98 err = syscall(SYS_clock_gettime, clk_id, res); 100 pr_perror("syscall(SYS_clock_gettime(%d))", (int)clk_id); [all...] |
/linux-master/tools/perf/util/ |
H A D | clockid.h | 9 const char *clockid_name(clockid_t clk_id);
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H A D | clockid.c | 55 static int get_clockid_res(clockid_t clk_id, u64 *res_ns) argument 60 if (!clock_getres(clk_id, &res)) 110 const char *clockid_name(clockid_t clk_id) argument 115 if (cm->clockid == clk_id)
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/linux-master/drivers/clk/zynqmp/ |
H A D | clk-gate-zynqmp.c | 18 * @clk_id: Id of clock 23 u32 clk_id; member in struct:zynqmp_clk_gate 38 u32 clk_id = gate->clk_id; local 41 ret = zynqmp_pm_clock_enable(clk_id); 45 __func__, clk_name, clk_id, ret); 58 u32 clk_id = gate->clk_id; local 61 ret = zynqmp_pm_clock_disable(clk_id); 65 __func__, clk_name, clk_id, re 78 u32 clk_id = gate->clk_id; local 107 zynqmp_clk_register_gate(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) argument [all...] |
H A D | pll.c | 16 * @clk_id: PLL clock ID 21 u32 clk_id; member in struct:zynqmp_pll 52 u32 clk_id = clk->clk_id; local 57 ret = zynqmp_pm_get_pll_frac_mode(clk_id, ret_payload); 75 u32 clk_id = clk->clk_id; local 85 ret = zynqmp_pm_set_pll_frac_mode(clk_id, mode); 137 u32 clk_id = clk->clk_id; local 181 u32 clk_id = clk->clk_id; local 229 u32 clk_id = clk->clk_id; local 253 u32 clk_id = clk->clk_id; local 281 u32 clk_id = clk->clk_id; local 312 zynqmp_clk_register_pll(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) argument [all...] |
H A D | clk-mux-zynqmp.c | 27 * @clk_id: Id of clock 32 u32 clk_id; member in struct:zynqmp_clk_mux 47 u32 clk_id = mux->clk_id; local 51 ret = zynqmp_pm_clock_getparent(clk_id, &val); 77 u32 clk_id = mux->clk_id; local 80 ret = zynqmp_pm_clock_setparent(clk_id, index); 124 * @clk_id: Id of this clock 131 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, argument [all...] |
H A D | clk-zynqmp.h | 70 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id, 75 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id, 81 u32 clk_id, 86 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id, 92 u32 clk_id,
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H A D | divider.c | 36 * @clk_id: Id of clock 44 u32 clk_id; member in struct:zynqmp_clk_divider 84 u32 clk_id = divider->clk_id; local 89 ret = zynqmp_pm_clock_getdivider(clk_id, &div); 127 u32 clk_id = divider->clk_id; local 135 ret = zynqmp_pm_clock_getdivider(clk_id, &bestdiv); 174 u32 clk_id = divider->clk_id; local 219 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) argument 272 zynqmp_clk_register_divider(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) argument [all...] |
H A D | clkc.c | 69 * @clk_id: Clock id 79 u32 clk_id; member in struct:zynqmp_clock 122 static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id, 142 * @clk_id: Clock index 146 static inline int zynqmp_is_valid_clock(u32 clk_id) argument 148 if (clk_id >= clock_max_idx) 151 return clock[clk_id].valid; 156 * @clk_id: Clock index 161 static int zynqmp_get_clock_name(u32 clk_id, char *clk_name) argument 165 ret = zynqmp_is_valid_clock(clk_id); 181 zynqmp_get_clock_type(u32 clk_id, u32 *type) argument 310 zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) argument 445 zynqmp_clock_get_topology(u32 clk_id, struct clock_topology *topology, u32 *num_nodes) argument 512 zynqmp_clock_get_parents(u32 clk_id, struct clock_parent *parents, u32 *num_parents) argument 545 zynqmp_get_parent_list(struct device_node *np, u32 clk_id, const char **parent_list, u32 *num_parents) argument 586 zynqmp_register_clk_topology(int clk_id, char *clk_name, int num_parents, const char **parent_names) argument [all...] |
/linux-master/sound/soc/qcom/qdsp6/ |
H A D | q6dsp-lpass-clocks.h | 7 int clk_id; member in struct:q6dsp_clk_init 14 .clk_id = id, \ 22 int (*lpass_set_clk)(struct device *dev, int clk_id, int attr,
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H A D | q6prm.c | 112 static int q6prm_request_lpass_clock(struct device *dev, int clk_id, int clk_attr, int clk_root, argument 137 req->clock_id.clock_id = clk_id; 149 static int q6prm_release_lpass_clock(struct device *dev, int clk_id, int clk_attr, int clk_root, argument 174 rel->clock_id.clock_id = clk_id; 183 int q6prm_set_lpass_clock(struct device *dev, int clk_id, int clk_attr, int clk_root, argument 187 return q6prm_request_lpass_clock(dev, clk_id, clk_attr, clk_root, freq); 189 return q6prm_release_lpass_clock(dev, clk_id, clk_attr, clk_root, freq);
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/linux-master/tools/testing/selftests/vDSO/ |
H A D | vdso_test_abi.c | 32 typedef long (*vdso_clock_gettime_t)(clockid_t clk_id, struct timespec *ts); 33 typedef long (*vdso_clock_getres_t)(clockid_t clk_id, struct timespec *ts); 75 static void vdso_test_clock_gettime(clockid_t clk_id) argument 84 vdso_clock_name[clk_id]); 89 long ret = vdso_clock_gettime(clk_id, &ts); 95 vdso_clock_name[clk_id]); 98 vdso_clock_name[clk_id]); 125 static void vdso_test_clock_getres(clockid_t clk_id) argument 136 vdso_clock_name[clk_id]); 141 long ret = vdso_clock_getres(clk_id, [all...] |
/linux-master/drivers/clk/keystone/ |
H A D | sci-clk.c | 43 * @clk_id: Clock index 54 u32 clk_id; member in struct:sci_clk 79 clk->clk_id, enable_ssc, 96 clk->clk_id); 100 clk->dev_id, clk->clk_id, ret); 117 clk->clk_id, &req_state, 122 clk->dev_id, clk->clk_id, ret); 145 clk->clk_id, &freq); 149 clk->dev_id, clk->clk_id, ret); 180 clk->clk_id, 428 int clk_id = 0; local 520 int clk_id; local [all...] |
/linux-master/drivers/firmware/arm_scmi/ |
H A D | clock.c | 147 __le32 clk_id; member in struct:scmi_msg_clock_rate_notify 167 u32 clk_id, enum clk_state state, 171 u32 clk_id, enum scmi_clock_oem_config oem_type, 182 scmi_clock_domain_lookup(struct clock_info *ci, u32 clk_id) argument 184 if (clk_id >= ci->num_clocks) 187 return ci->clk + clk_id; 228 u32 clk_id; member in struct:scmi_clk_ipriv 238 msg->id = cpu_to_le32(p->clk_id); 289 static int scmi_clock_possible_parents(const struct scmi_protocol_handle *ph, u32 clk_id, argument 299 .clk_id 319 scmi_clock_get_permissions(const struct scmi_protocol_handle *ph, u32 clk_id, struct scmi_clock_info *clk) argument 347 scmi_clock_attributes_get(const struct scmi_protocol_handle *ph, u32 clk_id, struct clock_info *cinfo, u32 version) argument 505 scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id, struct scmi_clock_info *clk) argument 545 scmi_clock_rate_get(const struct scmi_protocol_handle *ph, u32 clk_id, u64 *value) argument 566 scmi_clock_rate_set(const struct scmi_protocol_handle *ph, u32 clk_id, u64 rate) argument 622 scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id, enum clk_state state, enum scmi_clock_oem_config __unused0, u32 __unused1, bool atomic) argument 652 scmi_clock_set_parent(const struct scmi_protocol_handle *ph, u32 clk_id, u32 parent_id) argument 690 scmi_clock_get_parent(const struct scmi_protocol_handle *ph, u32 clk_id, u32 *parent_id) argument 713 scmi_clock_config_set_v2(const struct scmi_protocol_handle *ph, u32 clk_id, enum clk_state state, enum scmi_clock_oem_config oem_type, u32 oem_val, bool atomic) argument 751 scmi_clock_enable(const struct scmi_protocol_handle *ph, u32 clk_id, bool atomic) argument 768 scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id, bool atomic) argument 787 scmi_clock_config_get_v2(const struct scmi_protocol_handle *ph, u32 clk_id, enum scmi_clock_oem_config oem_type, u32 *attributes, bool *enabled, u32 *oem_val, bool atomic) argument 829 scmi_clock_config_get(const struct scmi_protocol_handle *ph, u32 clk_id, enum scmi_clock_oem_config oem_type, u32 *attributes, bool *enabled, u32 *oem_val, bool atomic) argument 858 scmi_clock_state_get(const struct scmi_protocol_handle *ph, u32 clk_id, bool *enabled, bool atomic) argument 867 scmi_clock_config_oem_set(const struct scmi_protocol_handle *ph, u32 clk_id, enum scmi_clock_oem_config oem_type, u32 oem_val, bool atomic) argument 886 scmi_clock_config_oem_get(const struct scmi_protocol_handle *ph, u32 clk_id, enum scmi_clock_oem_config oem_type, u32 *oem_val, u32 *attributes, bool atomic) argument 913 scmi_clock_info_get(const struct scmi_protocol_handle *ph, u32 clk_id) argument 964 scmi_clk_rate_notify(const struct scmi_protocol_handle *ph, u32 clk_id, int message_id, bool enable) argument [all...] |
/linux-master/drivers/pmdomain/mediatek/ |
H A D | mtk-scpsys.c | 81 enum clk_id { enum 119 * @clk_id: The basic clocks required by this power domain. 129 enum clk_id clk_id[MAX_CLKS]; member in struct:scp_domain_data 494 for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { 495 struct clk *c = clk[data->clk_id[j]]; 562 .clk_id = {CLK_NONE}, 570 .clk_id = {CLK_MM}, 580 .clk_id = {CLK_MFG}, 589 .clk_id [all...] |
/linux-master/drivers/clk/mmp/ |
H A D | reset.h | 10 unsigned int clk_id; member in struct:mmp_clk_reset_cell
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/linux-master/drivers/clk/tegra/ |
H A D | clk-tegra-audio.c | 35 int clk_id; member in struct:tegra_sync_source_initdata 41 .clk_id = tegra_clk_ ## _name,\ 66 int clk_id; member in struct:tegra_audio2x_clk_initdata 77 .clk_id = tegra_clk_ ## _name ## _2x,\ 181 dt_clk = tegra_lookup_dt_id(info->clk_id, tegra_clks); 207 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks); 231 dt_clk = tegra_lookup_dt_id(data->clk_id, tegra_clks);
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H A D | clk.c | 262 for (; dup_list->clk_id < clk_max; dup_list++) { 263 clk = clks[dup_list->clk_id]; 274 for (; tbl->clk_id < clk_max; tbl++) { 275 clk = clks[tbl->clk_id]; 278 __func__, PTR_ERR(clk), tbl->clk_id); 373 struct clk ** __init tegra_lookup_dt_id(int clk_id, argument 376 if (tegra_clk[clk_id].present) 377 return &clks[tegra_clk[clk_id].dt_id];
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/linux-master/sound/soc/ti/ |
H A D | omap-dmic.c | 279 static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id, argument 298 if (dmic->sysclk == clk_id) { 309 switch (clk_id) { 320 dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id); 353 dmic->sysclk = clk_id; 363 static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id, argument 368 if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) { 369 dev_err(dmic->dev, "output clk_id (%d) not supported\n", 370 clk_id); 390 omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir) argument [all...] |
/linux-master/drivers/clk/baikal-t1/ |
H A D | clk-ccu-pll.c | 87 unsigned int clk_id) 92 if (pll_info[idx].id == clk_id) 134 unsigned int clk_id; local 136 clk_id = clkspec->args[0]; 137 pll = ccu_pll_find_desc(data, clk_id); 140 pr_info("Invalid PLL clock ID %d specified\n", clk_id); 86 ccu_pll_find_desc(struct ccu_pll_data *data, unsigned int clk_id) argument
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/linux-master/sound/soc/codecs/ |
H A D | adav80x.c | 538 int clk_id, int source, 545 switch (clk_id) { 558 if (adav80x->clk_src != clk_id) { 561 adav80x->clk_src = clk_id; 562 if (clk_id == ADAV80X_CLK_XTAL) 563 clk_id = ADAV80X_CLK_XIN; 565 iclk_ctrl1 = ADAV80X_ICLK_CTRL1_DAC_SRC(clk_id) | 566 ADAV80X_ICLK_CTRL1_ADC_SRC(clk_id) | 567 ADAV80X_ICLK_CTRL1_ICLK2_SRC(clk_id); 568 iclk_ctrl2 = ADAV80X_ICLK_CTRL2_ICLK1_SRC(clk_id); 537 adav80x_set_sysclk(struct snd_soc_component *component, int clk_id, int source, unsigned int freq, int dir) argument [all...] |
/linux-master/drivers/firmware/ |
H A D | ti_sci.c | 937 * @clk_id: Clock identifier for the device for this request. 946 u32 dev_id, u32 clk_id, 974 if (clk_id < 255) { 975 req->clk_id = clk_id; 977 req->clk_id = 255; 978 req->clk_id_32 = clk_id; 1002 * @clk_id: Clock identifier for the device for this request. 1011 u32 dev_id, u32 clk_id, 1042 if (clk_id < 25 945 ti_sci_set_clock_state(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 flags, u8 state) argument 1010 ti_sci_cmd_get_clock_state(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u8 *programmed_state, u8 *current_state) argument 1086 ti_sci_cmd_get_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool needs_ssc, bool can_change_freq, bool enable_input_term) argument 1112 ti_sci_cmd_idle_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id) argument 1132 ti_sci_cmd_put_clock(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id) argument 1151 ti_sci_cmd_clk_is_auto(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state) argument 1180 ti_sci_cmd_clk_is_on(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state, bool *curr_state) argument 1213 ti_sci_cmd_clk_is_off(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, bool *req_state, bool *curr_state) argument 1245 ti_sci_cmd_clk_set_parent(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 parent_id) argument 1313 ti_sci_cmd_clk_get_parent(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 *parent_id) argument 1382 ti_sci_cmd_clk_get_num_parents(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u32 *num_parents) argument 1460 ti_sci_cmd_clk_get_match_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 min_freq, u64 target_freq, u64 max_freq, u64 *match_freq) argument 1537 ti_sci_cmd_clk_set_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 min_freq, u64 target_freq, u64 max_freq) argument 1603 ti_sci_cmd_clk_get_freq(const struct ti_sci_handle *handle, u32 dev_id, u32 clk_id, u64 *freq) argument [all...] |
H A D | ti_sci.h | 239 * @clk_id: Clock identifier for the device for this request. 272 u8 clk_id; member in struct:ti_sci_msg_req_set_clock_state 284 * @clk_id: Clock identifier for the device for this request. 298 u8 clk_id; member in struct:ti_sci_msg_req_get_clock_state 325 * @clk_id: Clock identifier for the device for this request. 332 * @clk_id_32: Clock identifier if @clk_id field is 255. 341 u8 clk_id; member in struct:ti_sci_msg_req_set_clock_parent 351 * @clk_id: Clock identifier for the device for this request. 356 * @clk_id_32: Clock identifier if the @clk_id field contains 255. 363 u8 clk_id; member in struct:ti_sci_msg_req_get_clock_parent 401 u8 clk_id; member in struct:ti_sci_msg_req_get_clock_num_parents 452 u8 clk_id; member in struct:ti_sci_msg_req_query_clock_freq 511 u8 clk_id; member in struct:ti_sci_msg_req_set_clock_freq 532 u8 clk_id; member in struct:ti_sci_msg_req_get_clock_freq [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | smu_v11_0.c | 502 uint8_t clk_id, 510 input.clk_id = clk_id; 798 int clk_id; local 804 clk_id = smu_cmn_to_asic_specific_index(smu, 807 if (clk_id < 0) 811 clk_id << 16, clock); 822 clk_id << 16, clock); 1707 int ret = 0, clk_id = 0; local 1738 clk_id 501 smu_v11_0_atom_get_smu_clockinfo(struct amdgpu_device *adev, uint8_t clk_id, uint8_t syspll_id, uint32_t *clk_freq) argument 1768 int ret = 0, clk_id = 0; local 1805 int ret = 0, clk_id = 0; local 1962 int ret = 0, clk_id = 0; local [all...] |
/linux-master/sound/soc/intel/skylake/ |
H A D | skl-ssp-clk.h | 42 u8 clk_id; member in struct:skl_clk_parent_src
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