Searched refs:clear_state_gpu_addr (Results 1 - 12 of 12) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_rlc.h | 195 uint64_t clear_state_gpu_addr; member in struct:amdgpu_rlc
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| H A D | amdgpu_rlc.c | 139 &adev->gfx.rlc.clear_state_gpu_addr,
272 &adev->gfx.rlc.clear_state_gpu_addr,
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| H A D | gfx_v6_0.c | 2367 &adev->gfx.rlc.clear_state_gpu_addr,
2377 reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256;
2789 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
2896 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
2904 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
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| H A D | gfx_v7_0.c | 3833 WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr));
3834 WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr));
4494 &adev->gfx.rlc.clear_state_gpu_addr,
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| H A D | gfx_v8_0.c | 2060 &adev->gfx.rlc.clear_state_gpu_addr,
3870 adev->gfx.rlc.clear_state_gpu_addr >> 32);
3872 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
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| H A D | gfx_v9_0.c | 2200 &adev->gfx.rlc.clear_state_gpu_addr,
2487 adev->gfx.rlc.clear_state_gpu_addr >> 32);
2489 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
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| H A D | gfx_v11_0.c | 692 &adev->gfx.rlc.clear_state_gpu_addr,
1789 adev->gfx.rlc.clear_state_gpu_addr >> 32);
1791 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
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| H A D | gfx_v10_0.c | 4132 &adev->gfx.rlc.clear_state_gpu_addr,
5050 adev->gfx.rlc.clear_state_gpu_addr >> 32);
5052 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
5056 adev->gfx.rlc.clear_state_gpu_addr >> 32);
5058 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
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| /linux-master/drivers/gpu/drm/radeon/ |
| H A D | evergreen.c | 4266 &rdev->rlc.clear_state_gpu_addr);
4285 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256;
4292 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4);
4412 WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
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| H A D | si.c | 5269 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
5766 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
5772 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
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| H A D | radeon.h | 955 uint64_t clear_state_gpu_addr; member in struct:radeon_rlc
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| H A D | cik.c | 6618 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr));
6619 WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr));
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