Searched refs:ch_num (Results 1 - 25 of 48) sorted by relevance

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/linux-master/drivers/usb/musb/
H A Dux500_dma.c37 u8 ch_num; member in struct:ux500_dma_channel
135 u8 ch_num = hw_ep->epnum - 1; local
141 if (ch_num > 7)
142 ch_num -= 8;
144 if (ch_num >= UX500_MUSB_DMA_NUM_RX_TX_CHANNELS)
147 ux500_channel = is_tx ? &(controller->tx_channel[ch_num]) :
148 &(controller->rx_channel[ch_num]) ;
158 hw_ep->epnum, is_tx, ch_num);
168 dev_dbg(musb->controller, "channel=%d\n", ux500_channel->ch_num);
216 ux500_channel->ch_num, ux500_channe
243 u8 ch_num; local
275 u32 ch_num; local
[all...]
/linux-master/drivers/gpu/drm/imx/dcss/
H A Ddcss-dev.h128 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres);
129 void dcss_dpr_addr_set(struct dcss_dpr *dpr, int ch_num, u32 luma_base_addr,
131 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en);
132 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num,
134 void dcss_dpr_set_rotation(struct dcss_dpr *dpr, int ch_num, u32 rotation);
148 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha);
149 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num,
151 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num,
153 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, bool en);
167 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num,
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H A Ddcss-plane.c175 dcss_scaler_get_min_max_ratios(dcss->scaler, dcss_plane->ch_num,
244 dcss_dpr_addr_set(dcss->dpr, dcss_plane->ch_num, p1_ba, p2_ba,
312 dcss_dpr_format_set(dcss->dpr, dcss_plane->ch_num,
316 dcss_dpr_set_res(dcss->dpr, dcss_plane->ch_num, src_w, src_h);
317 dcss_dpr_set_rotation(dcss->dpr, dcss_plane->ch_num,
325 dcss_scaler_set_filter(dcss->scaler, dcss_plane->ch_num,
328 dcss_scaler_setup(dcss->scaler, dcss_plane->ch_num,
335 dcss_dtg_plane_pos_set(dcss->dtg, dcss_plane->ch_num,
337 dcss_dtg_plane_alpha_set(dcss->dtg, dcss_plane->ch_num,
340 if (!dcss_plane->ch_num
[all...]
H A Ddcss-kms.h14 int ch_num; member in struct:dcss_plane
H A Ddcss-dpr.c109 int ch_num; member in struct:dcss_dpr_ch
146 ch->ch_num = i;
217 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres) argument
219 struct dcss_dpr_ch *ch = &dpr->ch[ch_num];
244 void dcss_dpr_addr_set(struct dcss_dpr *dpr, int ch_num, u32 luma_base_addr, argument
247 struct dcss_dpr_ch *ch = &dpr->ch[ch_num];
325 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en) argument
327 struct dcss_dpr_ch *ch = &dpr->ch[ch_num];
462 switch (ch->ch_num) {
492 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num, argument
532 dcss_dpr_set_rotation(struct dcss_dpr *dpr, int ch_num, u32 rotation) argument
[all...]
H A Ddcss-dtg.c242 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num, argument
254 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num);
255 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num);
258 DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num); local
260 DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num); local
264 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha) argument
266 if (ch_num)
272 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num, argument
276 if (ch_num)
324 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, boo argument
[all...]
H A Ddcss-scaler.c347 void dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en) argument
349 struct dcss_scaler_ch *ch = &scl->ch[ch_num];
561 int dcss_scaler_get_min_max_ratios(struct dcss_scaler *scl, int ch_num, argument
564 *min = upscale_fp(dcss_scaler_factors[ch_num].upscale, 16);
565 *max = downscale_fp(dcss_scaler_factors[ch_num].downscale, 16);
760 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num, argument
763 struct dcss_scaler_ch *ch = &scl->ch[ch_num];
768 void dcss_scaler_setup(struct dcss_scaler *scl, int ch_num, argument
773 struct dcss_scaler_ch *ch = &scl->ch[ch_num];
/linux-master/include/uapi/linux/
H A Drio_cm_cdev.h52 __u16 ch_num; member in struct:rio_cm_msg
59 __u16 ch_num; member in struct:rio_cm_accept
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v8_10.h55 #define SWIZZLE_MODE_TMP_ADDR(na, ch_num, ch_idx) \
56 ((((na) >> 10) * (ch_num) + (ch_idx)) << 10)
/linux-master/drivers/hwmon/
H A Dpowr1220.c107 static int powr1220_read_adc(struct device *dev, int ch_num) argument
116 if (time_after(jiffies, data->adc_last_updated[ch_num] + HZ) ||
117 !data->adc_valid[ch_num]) {
124 if (data->adc_maxes[ch_num] > ADC_MAX_LOW_MEASUREMENT_MV ||
125 data->adc_maxes[ch_num] == 0)
130 adc_range | ch_num);
156 data->adc_values[ch_num] = reading;
157 data->adc_valid[ch_num] = true;
158 data->adc_last_updated[ch_num] = jiffies;
161 if (reading > data->adc_maxes[ch_num])
[all...]
H A Dmr75203.c140 * (0..num_vm-1) and channel-index (0..ch_num-1) where N = num_vm * ch_num.
633 u32 vm_num, u32 ch_num, u8 *vm_idx)
645 memset(vm_active_ch, ch_num, vm_num);
646 pvt->vm_channels.max = ch_num;
647 pvt->vm_channels.total = ch_num * vm_num;
650 if (vm_active_ch[i] > ch_num) {
769 u32 ts_num, vm_num, pd_num, ch_num, val, index, i; local
808 ch_num = (val & CH_NUM_MSK) >> CH_NUM_SFT;
878 ret = pvt_get_active_channel(dev, pvt, vm_num, ch_num, vm_id
632 pvt_get_active_channel(struct device *dev, struct pvt_device *pvt, u32 vm_num, u32 ch_num, u8 *vm_idx) argument
[all...]
/linux-master/sound/drivers/
H A Dpcmtest.c174 short ch_num; local
181 ch_num = (v_iter->total_bytes / v_iter->sample_bytes) % runtime->channels;
182 if (current_byte != patt_bufs[ch_num].buf[ch_pos_i(v_iter->total_bytes,
185 % patt_bufs[ch_num].len]) {
199 short ch_num; local
203 ch_num = i % channels;
204 current_byte = runtime->dma_area[buf_pos_n(v_iter, channels, ch_num)];
207 if (current_byte != patt_bufs[ch_num].buf[(v_iter->total_bytes / channels)
208 % patt_bufs[ch_num].len]) {
242 short ch_num; local
[all...]
/linux-master/drivers/bus/mhi/host/
H A Dpci_generic.c53 #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \
55 .num = ch_num, \
68 #define MHI_CHANNEL_CONFIG_DL(ch_num, ch_name, el_count, ev_ring) \
70 .num = ch_num, \
83 #define MHI_CHANNEL_CONFIG_DL_AUTOQUEUE(ch_num, ch_name, el_count, ev_ring) \
85 .num = ch_num, \
112 #define MHI_CHANNEL_CONFIG_HW_UL(ch_num, ch_name, el_count, ev_ring) \
114 .num = ch_num, \
127 #define MHI_CHANNEL_CONFIG_HW_DL(ch_num, ch_name, el_count, ev_ring) \
129 .num = ch_num, \
[all...]
H A Dtrace.h98 __field(int, ch_num)
107 __entry->ch_num = mhi_chan->chan;
115 __get_str(name), __entry->ch_num, __entry->wp, __entry->tre_ptr,
223 __field(int, ch_num)
230 __entry->ch_num = mhi_chan->chan;
236 __get_str(name), __entry->ch_num, __entry->reason,
/linux-master/drivers/input/misc/
H A Diqs269a.c328 unsigned int ch_num; member in struct:iqs269_private
357 unsigned int ch_num, unsigned int mode)
362 if (ch_num >= IQS269_NUM_CH)
370 engine_a = be16_to_cpu(ch_reg[ch_num].engine_a);
375 ch_reg[ch_num].engine_a = cpu_to_be16(engine_a);
384 unsigned int ch_num, unsigned int *mode)
389 if (ch_num >= IQS269_NUM_CH)
393 engine_a = be16_to_cpu(ch_reg[ch_num].engine_a);
403 unsigned int ch_num, unsigned int base)
408 if (ch_num >
356 iqs269_ati_mode_set(struct iqs269_private *iqs269, unsigned int ch_num, unsigned int mode) argument
383 iqs269_ati_mode_get(struct iqs269_private *iqs269, unsigned int ch_num, unsigned int *mode) argument
402 iqs269_ati_base_set(struct iqs269_private *iqs269, unsigned int ch_num, unsigned int base) argument
447 iqs269_ati_base_get(struct iqs269_private *iqs269, unsigned int ch_num, unsigned int *base) argument
482 iqs269_ati_target_set(struct iqs269_private *iqs269, unsigned int ch_num, unsigned int target) argument
509 iqs269_ati_target_get(struct iqs269_private *iqs269, unsigned int ch_num, unsigned int *target) argument
[all...]
/linux-master/sound/soc/amd/
H A Dacp-pcm-dma.c132 static void config_acp_dma_channel(void __iomem *acp_mmio, u8 ch_num, argument
139 dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
141 acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
146 acp_mmio, mmACP_DMA_DSCR_STRT_IDX_0 + ch_num);
153 acp_mmio, mmACP_DMA_DSCR_CNT_0 + ch_num);
156 acp_reg_write(priority_level, acp_mmio, mmACP_DMA_PRIO_0 + ch_num);
180 static void pre_config_reset(void __iomem *acp_mmio, u16 ch_num) argument
186 dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
188 acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
190 ret = readl_poll_timeout(acp_mmio + ((mmACP_DMA_CNTL_0 + ch_num) *
414 acp_dma_start(void __iomem *acp_mmio, u16 ch_num, bool is_circular) argument
454 acp_dma_stop(void __iomem *acp_mmio, u8 ch_num) argument
[all...]
/linux-master/drivers/rapidio/
H A Drio_cm.c224 static struct rio_channel *riocm_ch_alloc(u16 ch_num);
1278 * @ch_num: channel ID (1 ... RIOCM_MAX_CHNUM, 0 = automatic)
1283 static struct rio_channel *riocm_ch_alloc(u16 ch_num) argument
1293 if (ch_num) {
1295 start = ch_num;
1296 end = ch_num + 1;
1332 * @ch_num: channel ID (1 ... RIOCM_MAX_CHNUM, 0 = automatic)
1334 * Allocates and initializes a new channel object. If the parameter ch_num > 0
1336 * specified ID for the new channel. If ch_num = 0, channel ID will be assigned
1346 static struct rio_channel *riocm_ch_create(u16 *ch_num) argument
1661 u16 ch_num; local
1687 u16 ch_num; local
1735 u16 ch_num; local
[all...]
/linux-master/drivers/most/
H A Dmost_snd.c416 static int split_arg_list(char *buf, u16 *ch_num, char **sample_res) argument
424 ret = kstrtou16(num, 0, ch_num);
449 u16 ch_num, char *sample_res,
462 if (!ch_num) {
467 if (cfg->subbuffer_size != ch_num * sinfo[i].bytes) {
481 pcm_hw->channels_min = ch_num;
482 pcm_hw->channels_max = ch_num;
524 u16 ch_num; local
533 ret = split_arg_list(arg_list_cpy, &ch_num, &sample_res);
589 ret = audio_set_hw_params(&channel->pcm_hardware, ch_num, sample_re
448 audio_set_hw_params(struct snd_pcm_hardware *pcm_hw, u16 ch_num, char *sample_res, struct most_channel_config *cfg) argument
[all...]
/linux-master/drivers/dma/ti/
H A Dedma.c221 int ch_num; member in struct:edma_chan
393 int channel = EDMA_CHAN_SLOT(echan->ch_num);
404 int channel = EDMA_CHAN_SLOT(echan->ch_num);
549 int channel = EDMA_CHAN_SLOT(echan->ch_num);
576 int channel = EDMA_CHAN_SLOT(echan->ch_num);
602 int channel = EDMA_CHAN_SLOT(echan->ch_num);
612 int channel = EDMA_CHAN_SLOT(echan->ch_num);
622 int channel = EDMA_CHAN_SLOT(echan->ch_num);
635 int channel = EDMA_CHAN_SLOT(echan->ch_num);
654 int channel = EDMA_CHAN_SLOT(echan->ch_num);
1905 edma_is_memcpy_channel(int ch_num, s32 *memcpy_channels) argument
[all...]
/linux-master/drivers/i2c/busses/
H A Di2c-eg20t.c155 * @ch_num: specifies the number of i2c instance
162 int ch_num; member in struct:adapter_info
629 for (i = 0, flag = 0; i < adap_info->ch_num; i++) {
766 adap_info->ch_num = id->driver_data;
768 for (i = 0; i < adap_info->ch_num; i++) {
794 for (i = 0; i < adap_info->ch_num; i++) {
833 for (i = 0; i < adap_info->ch_num; i++) {
841 for (i = 0; i < adap_info->ch_num; i++)
859 for (i = 0; i < adap_info->ch_num; i++) {
867 for (i = 0; i < adap_info->ch_num;
[all...]
/linux-master/arch/sh/include/asm/
H A Ddma.h101 int ch_num; member in struct:dma_chan_caps
/linux-master/drivers/dma/
H A Dmoxart-dma.c140 int ch_num; member in struct:moxart_chan
350 __func__, ch->ch_num);
363 __func__, ch->ch_num);
593 ch->ch_num = i;
600 dev_dbg(dev, "%s: chs[%d]: ch->ch_num=%u ch->base=%p\n",
601 __func__, i, ch->ch_num, ch->base);
/linux-master/drivers/pci/endpoint/functions/
H A Dpci-epf-mhi.c43 #define MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, direction) \
45 .num = ch_num, \
50 #define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \
51 MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_TO_DEVICE)
53 #define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \
54 MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_FROM_DEVICE)
/linux-master/drivers/net/ethernet/ti/
H A Dcpsw_ethtool.c238 static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) argument
244 ch_stats_len = CPSW_STATS_CH_LEN * ch_num;
534 static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx, argument
553 while (*ch < ch_num) {
570 while (*ch > ch_num) {
/linux-master/include/video/
H A Dimx-ipu-v3.h165 static inline int ipu_channel_alpha_channel(int ch_num) argument
167 switch (ch_num) {

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