Searched refs:cgr_val (Results 1 - 2 of 2) sorted by last modified time
| /linux-master/drivers/clk/imx/ |
| H A D | clk.h | 108 cgr_val, cgr_mask, clk_gate_flags, lock, share_count) \
110 cgr_val, cgr_mask, clk_gate_flags, lock, share_count))
142 #define imx_clk_gate2_cgr(name, parent, reg, shift, cgr_val) \
143 to_clk(__imx_clk_hw_gate2(name, parent, reg, shift, cgr_val, 0, NULL))
285 void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask,
384 void __iomem *reg, u8 shift, u8 cgr_val,
389 shift, cgr_val, 0x3, 0, &imx_ccm_lock, share_count);
383 __imx_clk_hw_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 cgr_val, unsigned long flags, unsigned int *share_count) argument
|
| H A D | clk-gate2.c | 32 u8 cgr_val; member in struct:clk_gate2
49 reg |= (gate->cgr_val & gate->cgr_mask) << gate->bit_idx;
90 u8 cgr_val, u8 cgr_mask)
94 if (((val >> bit_idx) & cgr_mask) == cgr_val)
109 gate->cgr_val, gate->cgr_mask);
138 void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask,
154 gate->cgr_val = cgr_val;
89 clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask) argument
136 clk_hw_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask, u8 clk_gate2_flags, spinlock_t *lock, unsigned int *share_count) argument
|
Completed in 218 milliseconds