Searched refs:cfgPSWUSCFG0_0_PCIE_MC_BLOCK_ALL0 (Results 1 - 2 of 2) sorted by path

/linux-master/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_2_3_offset.h827 #define cfgPSWUSCFG0_0_PCIE_MC_BLOCK_ALL0 0x0308 macro
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H A Dnbio_4_3_0_offset.h2673 #define cfgPSWUSCFG0_0_PCIE_MC_BLOCK_ALL0 0xfffe00000308 macro
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