Searched refs:cfgPCIE_PWR_BUDGET_ENH_CAP_LIST (Results 1 - 2 of 2) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_offset.h505 #define cfgPCIE_PWR_BUDGET_ENH_CAP_LIST 0x0240 macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h137 #define cfgPCIE_PWR_BUDGET_ENH_CAP_LIST 0x0240 // duplicate macro

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