/linux-master/include/linux/platform_data/x86/ |
H A D | pwm-lpss.h | 22 bool bypass; member in struct:pwm_lpss_boardinfo
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/linux-master/include/uapi/linux/netfilter/ |
H A D | xt_NFQUEUE.h | 27 __u16 bypass; member in struct:xt_NFQ_info_v2
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/linux-master/include/sound/ |
H A D | wm2200.h | 41 unsigned int bypass:1; /** Use bypass mode */ member in struct:wm2200_micbias
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/linux-master/arch/arm/mach-omap2/ |
H A D | sram.h | 12 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 25 int bypass); 38 int bypass);
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H A D | clkt2xxx_dpllcore.c | 114 u32 bypass = 0; local 162 bypass = 1; 169 bypass);
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H A D | clkt2xxx_virt_prcm_set.c | 100 u32 cur_rate, done_rate, bypass = 0; local 135 bypass = 1; 153 bypass);
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/linux-master/drivers/usb/misc/ |
H A D | usb3503.c | 49 struct gpio_desc *bypass; member in struct:usb3503 113 int rst, bypass, conn; local 119 bypass = 0; 124 bypass = 1; 130 bypass = 1; 143 if (hub->bypass) 144 gpiod_set_value_cansleep(hub->bypass, bypass); 261 hub->bypass = devm_gpiod_get_optional(dev, "bypass", GPIOD_OUT_HIG [all...] |
/linux-master/drivers/md/bcache/ |
H A D | request.h | 20 unsigned int bypass:1; member in struct:data_insert_op::__anon79::__anon80
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H A D | stats.h | 55 bool hit, bool bypass);
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H A D | stats.c | 184 bool hit, bool bypass) 186 if (!bypass) 199 bool hit, bool bypass) 203 mark_cache_stats(&dc->accounting.collector, hit, bypass); 204 mark_cache_stats(&c->accounting.collector, hit, bypass); 183 mark_cache_stats(struct cache_stat_collector *stats, bool hit, bool bypass) argument 198 bch_mark_cache_accounting(struct cache_set *c, struct bcache_device *d, bool hit, bool bypass) argument
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/linux-master/drivers/regulator/ |
H A D | anatop-regulator.c | 30 bool bypass; member in struct:anatop_regulator 65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; 85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { 100 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) 113 WARN_ON(!anatop_reg->bypass); 115 WARN_ON(anatop_reg->bypass); 117 *enable = anatop_reg->bypass; 126 if (enable == anatop_reg->bypass) 130 anatop_reg->bypass = enable; 270 sreg->bypass [all...] |
H A D | internal.h | 49 unsigned int bypass:1; member in struct:regulator
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/linux-master/drivers/clk/socfpga/ |
H A D | clk-pll.c | 16 /* Clock bypass bits */ 44 unsigned long bypass; local 47 bypass = readl(clk_mgr_base_addr + CLKMGR_BYPASS); 48 if (bypass & MAINPLL_BYPASS)
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/linux-master/arch/mips/cavium-octeon/executive/ |
H A D | cvmx-helper-jtag.c | 66 jtgc.s.bypass = 0x3; 68 jtgc.s.bypass = 0xf;
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/linux-master/include/trace/events/ |
H A D | bcache.h | 124 TP_PROTO(struct bio *bio, bool hit, bool bypass), 125 TP_ARGS(bio, hit, bypass), 133 __field(bool, bypass ) 142 __entry->bypass = bypass; 145 TP_printk("%d,%d %s %llu + %u hit %u bypass %u", 148 __entry->nr_sector, __entry->cache_hit, __entry->bypass) 153 bool writeback, bool bypass), 154 TP_ARGS(c, inode, bio, writeback, bypass), 163 __field(bool, bypass ) [all...] |
/linux-master/include/linux/mfd/arizona/ |
H A D | pdata.h | 63 unsigned int bypass:1; /** Use bypass mode */ member in struct:arizona_micbias
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/linux-master/net/sched/ |
H A D | sch_fifo.c | 99 bool bypass; local 119 bypass = sch->limit >= psched_mtu(qdisc_dev(sch)); 121 bypass = sch->limit >= 1; 123 if (bypass)
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_cdclk.h | 19 unsigned int cdclk, vco, ref, bypass; member in struct:intel_cdclk_config
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/linux-master/drivers/clk/imx/ |
H A D | clk-sscg-pll.c | 75 int bypass; member in struct:clk_sscg_pll_setup 146 temp_setup->bypass = PLL_BYPASS1; 220 temp_setup->bypass = PLL_BYPASS_NONE; 280 setup->bypass = PLL_BYPASS2; 365 /* set bypass here too since the parent might be the same */ 368 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, setup->bypass); 405 val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, pll->setup.bypass); 416 int bypass) 427 switch (bypass) { 443 rate, bypass); 411 __clk_sscg_pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req, uint64_t min, uint64_t max, uint64_t rate, int bypass) argument [all...] |
/linux-master/drivers/clk/at91/ |
H A D | sckc.c | 122 bool bypass, 148 if (bypass) 378 bool bypass; local 398 bypass = of_property_read_bool(child, "atmel,osc-bypass"); 402 bypass = of_property_read_bool(np, "atmel,osc-bypass"); 411 &parent_data, 1200000, bypass, bits); 479 bool bypass; local 496 bypass 118 at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, const struct clk_parent_data *parent_data, unsigned long startup, bool bypass, const struct clk_slow_bits *bits) argument [all...] |
/linux-master/drivers/media/platform/nxp/imx8-isi/ |
H A D | imx8-isi-hw.c | 122 bool *bypass) 165 *bypass = in_size->height == out_size->height && 211 bool *bypass) 254 *bypass = !coeffs; 304 bool bypass) 316 * If no scaling or color space conversion is needed, bypass the 319 if (bypass) 538 mxc_isi_pipe_irq_t irq_handler, bool bypass) 553 * when the channel isn't in bypass mode. 556 | (!bypass 118 mxc_isi_channel_set_scaling(struct mxc_isi_pipe *pipe, enum mxc_isi_encoding encoding, const struct v4l2_area *in_size, const struct v4l2_area *out_size, bool *bypass) argument 208 mxc_isi_channel_set_csc(struct mxc_isi_pipe *pipe, enum mxc_isi_encoding in_encoding, enum mxc_isi_encoding out_encoding, bool *bypass) argument 302 mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe, enum mxc_isi_input_id input, bool bypass) argument 537 mxc_isi_channel_acquire(struct mxc_isi_pipe *pipe, mxc_isi_pipe_irq_t irq_handler, bool bypass) argument 590 mxc_isi_channel_chain(struct mxc_isi_pipe *pipe, bool bypass) argument [all...] |
/linux-master/arch/mips/include/asm/octeon/ |
H A D | cvmx-asxx-defs.h | 200 uint64_t bypass:1; member in struct:cvmx_asxx_rld_bypass::cvmx_asxx_rld_bypass_s 202 uint64_t bypass:1; 469 uint64_t bypass:1; member in struct:cvmx_asxx_tx_comp_byp::cvmx_asxx_tx_comp_byp_cn30xx 475 uint64_t bypass:1; 493 uint64_t bypass:1; member in struct:cvmx_asxx_tx_comp_byp::cvmx_asxx_tx_comp_byp_cn50xx 503 uint64_t bypass:1;
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/linux-master/drivers/pwm/ |
H A D | pwm-sun4i.c | 125 * PWM chapter in H6 manual has a diagram which explains that if bypass 172 bool *bypass) 179 *bypass = sun4ichip->data->has_direct_mod_clk_output && 185 /* Skip calculation of other parameters if we bypass them */ 186 if (*bypass) 240 bool bypass; local 253 &bypass); 265 if (bypass) { 169 sun4i_pwm_calculate(struct sun4i_pwm_chip *sun4ichip, const struct pwm_state *state, u32 *dty, u32 *prd, unsigned int *prsclr, bool *bypass) argument
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/linux-master/include/linux/dsa/ |
H A D | ocelot.h | 219 static inline void ocelot_ifh_set_bypass(void *injection, u64 bypass) argument 221 packing(injection, &bypass, 127, 127, OCELOT_TAG_LEN, PACK, 0);
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/linux-master/arch/arm/mach-omap1/ |
H A D | sram.S | 36 strh r0, [r2] @ set dpll into bypass mode
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