/linux-master/arch/x86/include/asm/shared/ |
H A D | io.h | 7 #define BUILDIO(bwl, bw, type) \ 10 asm volatile("out" #bwl " %" #bw "0, %w1" \ 17 asm volatile("in" #bwl " %w1, %" #bw "0" \
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/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmutil/ |
H A D | d11.c | 28 static u16 d11n_bw(enum brcmu_chan_bw bw) argument 30 switch (bw) { 43 if (ch->bw == BRCMU_CHAN_BW_20) 52 0, d11n_bw(ch->bw)); 60 static u16 d11ac_bw(enum brcmu_chan_bw bw) argument 62 switch (bw) { 79 if (ch->bw == BRCMU_CHAN_BW_20 || ch->sb == BRCMU_CHAN_SB_NONE) 87 0, d11ac_bw(ch->bw)); 105 ch->bw = BRCMU_CHAN_BW_20; 109 ch->bw [all...] |
/linux-master/include/net/ |
H A D | regulatory.h | 227 #define REG_RULE_EXT(start, end, bw, gain, eirp, dfs_cac, reg_flags) \ 231 .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \ 238 #define REG_RULE(start, end, bw, gain, eirp, reg_flags) \ 239 REG_RULE_EXT(start, end, bw, gain, eirp, 0, reg_flags)
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/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_dp_dpia_bw.h | 55 * Allocates only what the stream needs for bw, so if: 68 * Plug => Try to allocate max bw from timing parameters supported by the sink 69 * Unplug => de-allocate bw 72 * @peak_bw: Peak bw used by the link/sink 74 * return: allocated bw else return 0 83 * @bw: Allocated or Estimated BW depending on the result 88 void dpia_handle_bw_alloc_response(struct dc_link *link, uint8_t bw, uint8_t result); 91 * Handle the validation of total BW here and confirm that the bw used by each 95 * @bw_needed[]: bw needed for each DPIA link based on timing 98 * return: TRUE if bw use [all...] |
/linux-master/net/ipv4/ |
H A D | tcp_bbr.c | 44 * we estimated that we reached the full bw of the pipe then we enter PROBE_BW; 84 BBR_PROBE_BW, /* discover, share bw: pace around estimated bw */ 93 struct minmax bw; /* Max recent delivery rate in pkts/uS << 24 */ member in struct:bbr 106 lt_use_bw:1; /* use lt_bw as our bw estimate? */ 113 full_bw_reached:1, /* reached full bw in Startup? */ 114 full_bw_cnt:2, /* number of rounds without large bw gains */ 119 u32 full_bw; /* recent bw, to estimate if pipe is full */ 132 /* Window length of bw filter (in rounds): */ 141 /* Pace at ~1% below estimated bw, o 256 bbr_bw_to_pacing_rate(struct sock *sk, u32 bw, int gain) argument 270 u64 bw; local 286 bbr_set_pacing_rate(struct sock *sk, u32 bw, int gain) argument 360 bbr_bdp(struct sock *sk, u32 bw, int gain) argument 413 bbr_inflight(struct sock *sk, u32 bw, int gain) argument 519 bbr_set_cwnd(struct sock *sk, const struct rate_sample *rs, u32 acked, u32 bw, int gain) argument 562 u32 inflight, bw; local 658 bbr_lt_bw_interval_done(struct sock *sk, u32 bw) argument 693 u64 bw; local 765 u64 bw; local 1030 u32 bw; local 1114 u64 bw = bbr_bw(sk); local [all...] |
H A D | tcp_yeah.c | 115 u64 bw; local 133 bw = tcp_snd_cwnd(tp); 134 bw *= rtt - yeah->vegas.baseRTT; 135 do_div(bw, rtt); 136 queue = bw;
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
H A D | dce110_clk_mgr.c | 183 context->bw_ctx.bw.dce.all_displays_in_sync; 185 context->bw_ctx.bw.dce.nbp_state_change_enable == false; 187 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; 189 context->bw_ctx.bw.dce.cpup_state_change_enable == false; 191 context->bw_ctx.bw.dce.blackout_recovery_time_us; 205 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz 211 context->bw_ctx.bw.dce.sclk_khz); 224 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; 255 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; 270 context->bw_ctx.bw [all...] |
/linux-master/drivers/net/wireless/ath/ath12k/ |
H A D | reg.c | 473 u16 bw; local 475 bw = end_freq - start_freq; 476 bw = min_t(u16, bw, max_bw); 478 if (bw >= 80 && bw < 160) 479 bw = 80; 480 else if (bw >= 40 && bw < 80) 481 bw 489 ath12k_reg_update_rule(struct ieee80211_reg_rule *reg_rule, u32 start_freq, u32 end_freq, u32 bw, u32 ant_gain, u32 reg_pwr, u32 reg_flags) argument 508 u16 bw; local [all...] |
H A D | mac.h | 76 enum rate_info_bw ath12k_mac_bw_to_mac80211_bw(enum ath12k_supported_bw bw); 77 enum ath12k_supported_bw ath12k_mac_mac80211_bw_to_ath12k_bw(enum rate_info_bw bw);
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/linux-master/drivers/media/usb/dvb-usb-v2/ |
H A D | mxl111sf-tuner.c | 79 u8 bw) 84 switch (bw) { 186 static int mxl1x1sf_tune_rf(struct dvb_frontend *fe, u32 freq, u8 bw) argument 193 mxl_dbg("(freq = %d, bw = 0x%x)", freq, bw); 206 reg_ctrl_array = mxl111sf_calc_phy_tune_regs(freq, bw); 268 u8 bw; local 275 bw = 0; /* ATSC */ 278 bw = 1; /* US CABLE */ 283 bw 78 mxl111sf_calc_phy_tune_regs(u32 freq, u8 bw) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/core/ |
H A D | dc_debug.c | 353 context->bw_ctx.bw.dcn.clk.dispclk_khz, 354 context->bw_ctx.bw.dcn.clk.dppclk_khz, 355 context->bw_ctx.bw.dcn.clk.dcfclk_khz, 356 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, 357 context->bw_ctx.bw.dcn.clk.fclk_khz, 358 context->bw_ctx.bw.dcn.clk.socclk_khz); 361 context->bw_ctx.bw.dcn.clk.dispclk_khz, 362 context->bw_ctx.bw.dcn.clk.dppclk_khz, 363 context->bw_ctx.bw.dcn.clk.dcfclk_khz, 364 context->bw_ctx.bw [all...] |
/linux-master/drivers/net/wireless/mediatek/mt76/mt76x2/ |
H A D | mcu.c | 15 int mt76x2_mcu_set_channel(struct mt76x02_dev *dev, u8 channel, u8 bw, argument 21 u8 bw; member in struct:__anon1004 31 .bw = bw,
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H A D | mt76x2.h | 59 int mt76x2_mcu_set_channel(struct mt76x02_dev *dev, u8 channel, u8 bw, 76 enum nl80211_band band, u8 bw);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
H A D | dcn30_fpu.c | 371 if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || 393 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; 401 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = 404 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { 441 context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 442 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 443 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 444 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 445 context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 446 context->bw_ctx.bw [all...] |
/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
H A D | rate.h | 90 /* mimo bw mask */ 92 /* mimo bw shift */ 137 u32 bw = rspec_get_bw(rspec); local 139 return bw == PHY_TXC1_BW_40MHZ || bw == PHY_TXC1_BW_40MHZ_DUP; 236 bool mcsallow, u8 bw, u8 txstreams); 243 void brcms_c_rateset_bw_mcs_filter(struct brcms_c_rateset *rateset, u8 bw);
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/linux-master/drivers/memory/samsung/ |
H A D | exynos-srom.c | 72 u32 cs, bw; local 90 bw = readl_relaxed(srom->reg_base + EXYNOS_SROM_BW); 91 bw = (bw & ~(EXYNOS_SROM_BW__CS_MASK << bank)) | (cs << bank); 92 writel_relaxed(bw, srom->reg_base + EXYNOS_SROM_BW);
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/linux-master/drivers/net/wireless/intel/iwlwifi/mvm/ |
H A D | rs-fw.c | 257 enum IWL_TLC_MCS_PER_BW bw, 261 ht_rates[IWL_TLC_NSS_2][bw] |= cpu_to_le16(mcs_msk); 264 ht_rates[IWL_TLC_NSS_1][bw] |= cpu_to_le16(mcs_msk); 269 rs_fw_rs_mcs2eht_mcs(enum IWL_TLC_MCS_PER_BW bw, argument 272 switch (bw) { 274 return &eht_mcs->bw._80; 276 return &eht_mcs->bw._160; 278 return &eht_mcs->bw._320; 298 enum IWL_TLC_MCS_PER_BW bw; local 308 mcs_rx_20.rx_tx_mcs7_max_nss = eht_rx_mcs->bw 256 rs_fw_set_eht_mcs_nss(__le16 ht_rates[][3], enum IWL_TLC_MCS_PER_BW bw, u8 max_nss, u16 mcs_msk) argument [all...] |
/linux-master/drivers/media/dvb-frontends/ |
H A D | dib7000m.c | 316 static int dib7000m_set_bandwidth(struct dib7000m_state *state, u32 bw) argument 320 if (!bw) 321 bw = 8000; 324 state->current_bandwidth = bw; 334 timf = timf * (bw / 50) / 160; 382 static void dib7000m_reset_pll_common(struct dib7000m_state *state, const struct dibx000_bandwidth_config *bw) argument 384 dib7000m_write_word(state, 18, (u16) (((bw->internal*1000) >> 16) & 0xffff)); 385 dib7000m_write_word(state, 19, (u16) ( (bw->internal*1000) & 0xffff)); 386 dib7000m_write_word(state, 21, (u16) ( (bw->ifreq >> 16) & 0xffff)); 387 dib7000m_write_word(state, 22, (u16) ( bw 394 const struct dibx000_bandwidth_config *bw = state->cfg.bw; local 427 const struct dibx000_bandwidth_config *bw = state->cfg.bw; local [all...] |
H A D | stb6100_cfg.h | 34 u32 bw = c->bandwidth_hz; local 42 c->bandwidth_hz = bw;
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/linux-master/drivers/net/wireless/ath/ath11k/ |
H A D | reg.c | 512 u16 bw; local 517 bw = end_freq - start_freq; 518 bw = min_t(u16, bw, max_bw); 520 if (bw >= 80 && bw < 160) 521 bw = 80; 522 else if (bw >= 40 && bw < 80) 523 bw 533 ath11k_reg_update_rule(struct ieee80211_reg_rule *reg_rule, u32 start_freq, u32 end_freq, u32 bw, u32 ant_gain, u32 reg_pwr, s8 psd, u32 reg_flags) argument 554 u16 bw; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml2_utils.c | 192 context->bw_ctx.bw.dcn.clk.dispclk_khz = out_clks->dispclk_khz; 193 context->bw_ctx.bw.dcn.clk.dcfclk_khz = out_clks->dcfclk_khz; 194 context->bw_ctx.bw.dcn.clk.dramclk_khz = out_clks->uclk_mts / 16; 195 context->bw_ctx.bw.dcn.clk.fclk_khz = out_clks->fclk_khz; 196 context->bw_ctx.bw.dcn.clk.phyclk_khz = out_clks->phyclk_khz; 197 context->bw_ctx.bw.dcn.clk.socclk_khz = out_clks->socclk_khz; 198 context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = out_clks->ref_dtbclk_khz; 199 context->bw_ctx.bw.dcn.clk.p_state_change_support = out_clks->p_state_supported; 294 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (unsigned int)in_ctx->v20.dml_core_ctx.mp.DCFCLKDeepSleep * 1000; 295 context->bw_ctx.bw [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | dcn31_fpu.c | 499 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 513 context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 514 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 515 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 516 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 517 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns = get_wm_z8_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 518 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_exit_z8_ns = get_wm_z8_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 519 context->bw_ctx.bw.dcn.watermarks.a.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 520 context->bw_ctx.bw.dcn.watermarks.a.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; 521 context->bw_ctx.bw [all...] |
/linux-master/drivers/net/wireless/realtek/rtw88/ |
H A D | mac.h | 31 void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw,
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H A D | phy.c | 1530 u8 bw, u8 rs, u8 ch, s8 pwr_limit) 1541 if (regd >= RTW_REGD_MAX || bw >= RTW_CHANNEL_WIDTH_MAX || 1544 "wrong txpwr_lmt regd=%u, band=%u bw=%u, rs=%u, ch_idx=%u, pwr_limit=%d\n", 1545 regd, band, bw, rs, ch_idx, pwr_limit); 1550 hal->tx_pwr_limit_2g[regd][bw][rs][ch_idx] = pwr_limit; 1551 ww = hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx]; 1553 hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx] = ww; 1555 hal->tx_pwr_limit_5g[regd][bw][rs][ch_idx] = pwr_limit; 1556 ww = hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx]; 1558 hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][r 1529 rtw_phy_set_tx_power_limit(struct rtw_dev *rtwdev, u8 regd, u8 band, u8 bw, u8 rs, u8 ch, s8 pwr_limit) argument 1564 rtw_xref_5g_txpwr_lmt(struct rtw_dev *rtwdev, u8 regd, u8 bw, u8 ch_idx, u8 rs_ht, u8 rs_vht) argument 1584 rtw_xref_txpwr_lmt_by_rs(struct rtw_dev *rtwdev, u8 regd, u8 bw, u8 ch_idx) argument 1600 rtw_xref_5g_txpwr_lmt_by_ch(struct rtw_dev *rtwdev, u8 regd, u8 bw) argument 1612 u8 bw; local 1628 __cfg_txpwr_lmt_by_alt(struct rtw_hal *hal, u8 regd, u8 regd_alt, u8 bw, u8 rs) argument 1644 u8 bw, rs; local 2025 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band, enum rtw_bandwidth bw, u8 rf_path, u8 rate, u8 channel, u8 regd) argument 2095 rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw, u8 ch, u8 regd, struct rtw_power_params *pwr_param) argument 2170 u8 bw; local 2274 __rtw_phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs) argument 2292 u8 regd, bw, rs; local 2303 rtw_phy_init_tx_power_limit(struct rtw_dev *rtwdev, u8 regd, u8 bw, u8 rs) argument 2322 u8 regd, path, rate, rs, bw; local [all...] |
/linux-master/include/drm/display/ |
H A D | drm_dp_tunnel.h | 56 int drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw); 85 u8 stream_id, int bw); 144 drm_dp_tunnel_alloc_bw(struct drm_dp_tunnel *tunnel, int bw) argument 211 u8 stream_id, int bw) 209 drm_dp_tunnel_atomic_set_stream_bw(struct drm_atomic_state *state, struct drm_dp_tunnel *tunnel, u8 stream_id, int bw) argument
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