Searched refs:bot_mpcc_id (Results 1 - 9 of 9) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_mpc.c423 int bot_mpcc_id; local
444 bot_mpcc_id = bot_sel;
445 REG_GET(MPCC_OPP_ID[bot_mpcc_id], MPCC_OPP_ID, &opp_id);
446 REG_GET(MPCC_TOP_SEL[bot_mpcc_id], MPCC_TOP_SEL, &top_sel);
448 struct mpcc *mpcc_bottom = mpc1_get_mpcc(mpc, bot_mpcc_id);
467 REG_GET(MPCC_BOT_SEL[mpcc_inst], MPCC_BOT_SEL, &s->bot_mpcc_id);
H A Ddcn10_hw_sequencer_debug.c402 i, s.opp_id, s.dpp_id, s.bot_mpcc_id,
/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dmpc.h265 uint32_t bot_mpcc_id; member in struct:mpcc_state
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_mpc.c552 REG_GET(MPCC_BOT_SEL[mpcc_inst], MPCC_BOT_SEL, &s->bot_mpcc_id);
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c181 i, s.opp_id, s.dpp_id, s.bot_mpcc_id,
/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_mpc.c1464 REG_GET(MPCC_BOT_SEL[mpcc_inst], MPCC_BOT_SEL, &s->bot_mpcc_id);
/linux-master/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c3366 if (s.bot_mpcc_id < MAX_MPCC)
3368 &pool->mpc->mpcc_array[s.bot_mpcc_id];
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c376 i, s.opp_id, s.dpp_id, s.bot_mpcc_id,
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c164 i, s.opp_id, s.dpp_id, s.bot_mpcc_id,

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