Searched refs:batch_offset (Results 1 - 5 of 5) sorted by relevance
| /linux-master/drivers/gpu/drm/i915/ |
| H A D | i915_cmd_parser.h | 20 unsigned long batch_offset,
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| H A D | i915_cmd_parser.c | 1428 * @batch_offset: byte offset in the batch at which execution starts
1442 unsigned long batch_offset,
1455 GEM_BUG_ON(!IS_ALIGNED(batch_offset, sizeof(*cmd)));
1457 GEM_BUG_ON(range_overflows_t(u64, batch_offset, batch_length,
1462 batch_offset, batch_length,
1475 batch_addr = gen8_canonical_addr(i915_vma_offset(batch) + batch_offset);
1440 intel_engine_cmd_parser(struct intel_engine_cs *engine, struct i915_vma *batch, unsigned long batch_offset, unsigned long batch_length, struct i915_vma *shadow, bool trampoline) argument
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| /linux-master/drivers/gpu/drm/i915/gt/ |
| H A D | intel_renderstate.h | 39 u32 batch_offset; member in struct:intel_renderstate
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| H A D | intel_renderstate.c | 89 so->batch_offset = i915_ggtt_offset(so->vma);
126 so->aux_offset += so->batch_offset;
223 so->batch_offset, so->batch_size,
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| H A D | gen7_renderclear.c | 102 static u32 batch_offset(const struct batch_chunk *bc, u32 *cs) function
149 u32 offset = batch_offset(state, cs);
181 u32 offset = batch_offset(state, cs);
201 return batch_offset(state,
216 u32 offset = batch_offset(state, cs);
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