Searched refs:bankw (Results 1 - 5 of 5) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/radeon/
H A Devergreen_cs.c183 unsigned bankw; member in struct:eg_surface
275 palign = (8 * surf->bankw * track->npipes) * surf->mtilea;
354 switch (surf->bankw) {
355 case 0: surf->bankw = 1; break;
356 case 1: surf->bankw = 2; break;
357 case 2: surf->bankw = 4; break;
358 case 3: surf->bankw = 8; break;
360 dev_warn(p->dev, "%s:%d %s invalid bankw %d\n",
361 __func__, __LINE__, prefix, surf->bankw);
417 surf.bankw
1398 unsigned bankw, bankh, mtaspect, tile_split; local
1661 unsigned bankw, bankh, mtaspect, tile_split; local
1689 unsigned bankw, bankh, mtaspect, tile_split; local
2500 unsigned bankw, bankh, mtaspect, tile_split; local
[all...]
H A Dradeon_object.c483 unsigned bankw, bankh, mtaspect, tilesplit, stilesplit; local
485 bankw = (tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK;
490 switch (bankw) {
H A Devergreen.c61 void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, argument
65 *bankw = (tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK;
69 switch (*bankw) {
71 case 1: *bankw = EVERGREEN_ADDR_SURF_BANK_WIDTH_1; break;
72 case 2: *bankw = EVERGREEN_ADDR_SURF_BANK_WIDTH_2; break;
73 case 4: *bankw = EVERGREEN_ADDR_SURF_BANK_WIDTH_4; break;
74 case 8: *bankw = EVERGREEN_ADDR_SURF_BANK_WIDTH_8; break;
H A Datombios_crtc.c1077 unsigned bankw, bankh, mtaspect, tile_split; local
1172 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split);
1174 fb_format |= EVERGREEN_GRPH_BANK_WIDTH(bankw);
H A Dradeon.h215 extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw,

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