Searched refs:bRFSI_RFENV (Results 1 - 5 of 5) sorted by path

/linux-master/drivers/staging/rtl8192e/rtl8192e/
H A Dr8190P_rtl8256.c72 bRFSI_RFENV);
76 bRFSI_RFENV << 16);
80 rtl92e_set_bb_reg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
82 rtl92e_set_bb_reg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
115 rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, bRFSI_RFENV,
120 bRFSI_RFENV << 16, u4RegValue);
H A Dr8192E_phyreg.h255 #define bRFSI_RFENV 0x10 macro
/linux-master/drivers/staging/rtl8712/
H A Drtl871x_mp_phy_regdef.h480 #define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ macro
/linux-master/drivers/staging/rtl8723bs/hal/
H A Drtl8723b_rf6052.c100 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
103 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16);
108 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
112 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
134 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
137 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
/linux-master/drivers/staging/rtl8723bs/include/
H A DHal8192CPhyReg.h568 #define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ macro

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