Searched refs:aq_hw_write_reg (Results 1 - 9 of 9) sorted by relevance

/linux-master/drivers/net/ethernet/aquantia/atlantic/hw_atl/
H A Dhw_atl_utils.c100 aq_hw_write_reg(self, 0x404, 0x40e1);
105 aq_hw_write_reg(self, 0x53C, val | 0x10);
108 aq_hw_write_reg(self, HW_ATL_GLB_SOFT_RES_ADR, (gsr & 0xBFFF) | 0x8000);
111 aq_hw_write_reg(self, 0x404, 0x80e0);
112 aq_hw_write_reg(self, 0x32a8, 0x0);
113 aq_hw_write_reg(self, 0x520, 0x1);
117 aq_hw_write_reg(self, 0x53C, val | 0x10);
120 aq_hw_write_reg(self, 0x53C, val & ~0x10);
122 aq_hw_write_reg(self, 0x404, 0x180e0);
139 aq_hw_write_reg(sel
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H A Dhw_atl_utils_fw2x.c183 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, val);
242 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_state);
310 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);
338 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);
368 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR,
397 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, wol_bits);
435 aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, ctrl2);
458 aq_hw_write_reg(self, HW_ATL_FW3X_EXT_CONTROL_ADDR, ptp_opts);
463 aq_hw_write_reg(self, HW_ATL_FW3X_PTP_ADJ_LSW_ADDR,
465 aq_hw_write_reg(sel
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H A Dhw_atl_llh.c64 aq_hw_write_reg(aq_hw, HW_ATL_GLB_CPU_SEM_ADR(semaphore), glb_cpu_sem);
129 aq_hw_write_reg(aq_hw, HW_ATL_ITR_IAMRLSW_ADR, irq_auto_masklsw);
297 aq_hw_write_reg(aq_hw, HW_ATL_ITR_IMCRLSW_ADR, irq_msk_clearlsw);
302 aq_hw_write_reg(aq_hw, HW_ATL_ITR_IMSRLSW_ADR, irq_msk_setlsw);
315 aq_hw_write_reg(aq_hw, HW_ATL_ITR_ISCRLSW_ADR, irq_status_clearlsw);
338 aq_hw_write_reg(aq_hw, HW_ATL_ITR_RSC_EN_ADR, enable);
483 aq_hw_write_reg(aq_hw, HW_ATL_GEN_INTR_MAP_ADR(regidx), gen_intr_map);
493 aq_hw_write_reg(aq_hw, HW_ATL_INTR_GLB_CTL_ADR, intr_glb_ctl);
498 aq_hw_write_reg(aq_hw, HW_ATL_INTR_THR_ADR(throttle), intr_thr);
505 aq_hw_write_reg(aq_h
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H A Dhw_atl_a0.c274 aq_hw_write_reg(self, 0x00007040U, 0x00000000U);
854 aq_hw_write_reg(self, 0x00002A00U, 0x40000000U);
855 aq_hw_write_reg(self, 0x00002A00U, 0x8D000000U);
H A Dhw_atl_b0.c464 aq_hw_write_reg(self, 0x00007040U, ATL_HW_IS_CHIP_FEATURE(self, TPO2) ?
524 aq_hw_write_reg(self, 0x00005040U, ATL_HW_IS_CHIP_FEATURE(self, RPF2) ?
588 aq_hw_write_reg(self, HW_ATL_PCI_REG_CONTROL6_ADR,
595 aq_hw_write_reg(self, HW_ATL_TX_DMA_TOTAL_REQ_LIMIT_ADR, 24);
/linux-master/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
H A Dhw_atl2_llh.c92 aq_hw_write_reg(aq_hw, HW_ATL2_TX_INTR_MODERATION_CTL_ADR(queue),
148 aq_hw_write_reg(aq_hw,
151 aq_hw_write_reg(aq_hw,
154 aq_hw_write_reg(aq_hw,
185 aq_hw_write_reg(aq_hw, HW_ATL2_MIF_SHARED_BUFFER_IN_ADR(i),
222 return aq_hw_write_reg(aq_hw, HW_ATL2_MIF_BOOT_REG_ADR, val);
232 return aq_hw_write_reg(aq_hw, HW_ATL2_MCP_HOST_REQ_INT_CLR_ADR,
H A Dhw_atl2.c142 aq_hw_write_reg(self,
151 aq_hw_write_reg(self,
/linux-master/drivers/net/ethernet/aquantia/atlantic/
H A Daq_hw_utils.c29 aq_hw_write_reg(aq_hw, addr, reg_new);
31 aq_hw_write_reg(aq_hw, addr, val);
51 void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value) function
H A Daq_hw_utils.h35 void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);

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