/linux-master/drivers/thermal/qcom/ |
H A D | tsens.h | 88 #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \ 89 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \ 90 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \ 91 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \ 92 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \ 93 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \ 94 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \ 95 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \ 96 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \ 97 [_name##_##8] = REG_FIELD(_offset [all...] |
/linux-master/arch/riscv/include/asm/ |
H A D | vdso.h | 23 (void __user *)((unsigned long)(base) + __vdso_##name##_offset) 29 (void __user *)((unsigned long)(base) + compat__vdso_##name##_offset)
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/linux-master/drivers/clk/bcm/ |
H A D | clk-kona.h | 91 #define POLICY(_offset, _bit) \ 93 .offset = (_offset), \ 151 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ 153 .offset = (_offset), \ 163 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ 165 .offset = (_offset), \ 174 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ 176 .offset = (_offset), \ 185 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ 187 .offset = (_offset), \ [all...] |
/linux-master/drivers/clk/renesas/ |
H A D | rcar-gen4-cpg.h | 36 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ 37 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SDH, _parent, .offset = _offset) 39 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ 40 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SD, _parent, .offset = _offset) 50 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ 51 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
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H A D | rcar-gen3-cpg.h | 37 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ 38 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset) 40 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ 41 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) 60 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ 61 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
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H A D | renesas-cpg-mssr.h | 53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ 54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset) 55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ 56 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
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/linux-master/drivers/clk/sunxi-ng/ |
H A D | ccu_mult.h | 17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ 21 .offset = _offset, \ 29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ 30 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
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/linux-master/drivers/net/ethernet/mellanox/mlxsw/ |
H A D | core_acl_flex_keys.h | 56 #define MLXSW_AFK_ELEMENT_INFO(_type, _element, _offset, _shift, _size) \ 61 .offset = _offset, \ 68 #define MLXSW_AFK_ELEMENT_INFO_U32(_element, _offset, _shift, _size) \ 70 _element, _offset, _shift, _size) 72 #define MLXSW_AFK_ELEMENT_INFO_BUF(_element, _offset, _size) \ 74 _element, _offset, 0, _size) 88 #define MLXSW_AFK_ELEMENT_INST(_type, _element, _offset, \ 94 .offset = _offset, \ 103 #define MLXSW_AFK_ELEMENT_INST_U32(_element, _offset, _shift, _size) \ 105 _element, _offset, _shif [all...] |
H A D | item.h | 266 #define MLXSW_ITEM8(_type, _cname, _iname, _offset, _shift, _sizebits) \ 268 .offset = _offset, \ 284 #define MLXSW_ITEM8_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ 287 .offset = _offset, \ 309 #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \ 311 .offset = _offset, \ 327 #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ 330 .offset = _offset, \ 352 #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \ 354 .offset = _offset, \ [all...] |
/linux-master/drivers/clk/st/ |
H A D | clkgen.h | 38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ 39 .offset = _offset, \
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/linux-master/drivers/pinctrl/berlin/ |
H A D | berlin.h | 37 #define BERLIN_PINCTRL_GROUP(_name, _offset, _width, _lsb, ...) \ 40 .offset = _offset, \
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/linux-master/drivers/clk/sprd/ |
H A D | div.h | 28 #define _SPRD_DIV_CLK(_offset, _shift, _width) \ 30 .offset = _offset, \ 40 #define SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _offset, \ 43 .div = _SPRD_DIV_CLK(_offset, _shift, _width), \
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/linux-master/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mtk-common.h | 109 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ 112 .offset = _offset, \ 134 #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ 137 .offset = _offset, \ 157 #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ 162 .offset = _offset, \
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/linux-master/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_tl_debugfs.h | 80 #define ADF_TL_COUNTER(_name, _type, _offset) \ 83 .offset1 = _offset \
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/linux-master/drivers/clk/tegra/ |
H A D | clk-tegra-periph.c | 132 #define MUX(_name, _parents, _offset, \ 134 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ 139 #define MUX_FLAGS(_name, _parents, _offset,\ 141 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ 146 #define MUX8(_name, _parents, _offset, \ 148 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ 153 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ 154 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ 159 #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \ 160 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ [all...] |
H A D | clk-tegra-audio.c | 52 #define AUDIO(_name, _offset) \ 56 .offset = _offset,\ 71 #define AUDIO2X(_name, _num, _offset) \ 79 .div_offset = _offset,\
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/linux-master/drivers/clk/mediatek/ |
H A D | clk-mt6795-apmixedsys.c | 76 #define _FH(_pllid, _fhid, _slope, _offset) { \ 81 .fhx_offset = _offset, \ 99 #define FH(_pllid, _fhid, _offset) _FH(_pllid, _fhid, 0x6003c97, _offset) 100 #define FH_M(_pllid, _fhid, _offset) _FH(_pllid, _fhid, 0x6000140, _offset)
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/linux-master/arch/powerpc/boot/ |
H A D | libfdt-wrapper.c | 33 unsigned long _offset = (off); \ 34 check_err(_offset) ? NULL : (void *)(_offset+1); \
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/linux-master/tools/testing/selftests/powerpc/nx-gzip/include/ |
H A D | nxu.h | 81 * convention as uint32_t variables in unions. If *_offset and *_mask 331 * The defines below has *_offset defined as the right most bit 428 #define getnn(ST, REG) ((be32toh(ST.REG) >> (31-REG##_offset)) \ 430 #define getpnn(ST, REG) ((be32toh((ST)->REG) >> (31-REG##_offset)) \ 438 << (31-REG##_offset))) 442 << (31-REG##_offset))) 453 & REG##_mask) << (31-REG##_offset)))) 455 | (((X) & REG##_mask) << (31-REG##_offset))))
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/linux-master/drivers/net/wireless/realtek/rtlwifi/ |
H A D | efuse.h | 74 void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf); 79 void read_efuse(struct ieee80211_hw *hw, u16 _offset,
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/linux-master/fs/bcachefs/ |
H A D | bcachefs.h | 251 #define bch2_fmt_dev_offset(_ca, _offset, fmt) "bcachefs (%s sector %llu): " fmt "\n", ((_ca)->name), (_offset) 253 #define bch2_fmt_inum_offset(_c, _inum, _offset, fmt) \ 254 "bcachefs (%s inum %llu offset %llu): " fmt "\n", ((_c)->name), (_inum), (_offset) 260 #define bch2_fmt_dev_offset(_ca, _offset, fmt) "%s sector %llu: " fmt "\n", ((_ca)->name), (_offset) 262 #define bch2_fmt_inum_offset(_c, _inum, _offset, fmt) \ 263 "inum %llu offset %llu: " fmt "\n", (_inum), (_offset) 304 #define bch_err_dev_offset(ca, _offset, fmt, ...) \ 305 bch2_print(c, KERN_ERR bch2_fmt_dev_offset(ca, _offset, fm [all...] |
/linux-master/tools/objtool/include/objtool/ |
H A D | elf.h | 326 #define for_offset_range(_offset, _start, _end) \ 327 for (_offset = ((_start) & OFFSET_STRIDE_MASK); \ 328 _offset >= ((_start) & OFFSET_STRIDE_MASK) && \ 329 _offset <= ((_end) & OFFSET_STRIDE_MASK); \ 330 _offset += OFFSET_STRIDE)
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/linux-master/drivers/bcma/ |
H A D | sprom.c | 185 #define SPEX(_field, _offset, _mask, _shift) \ 186 bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift)) 188 #define SPEX32(_field, _offset, _mask, _shift) \ 189 bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \ 190 sprom[SPOFF(_offset)]) & (_mask)) >> (_shift)) 192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ 194 SPEX(_field[0], _offset + 0, _mask, _shift); \ 195 SPEX(_field[1], _offset + 2, _mask, _shift); \ 196 SPEX(_field[2], _offset + 4, _mask, _shift); \ 197 SPEX(_field[3], _offset [all...] |
/linux-master/drivers/cdx/controller/ |
H A D | mcdi.h | 208 #define _MCDI_PTR(_buf, _offset) \ 209 ((u8 *)(_buf) + (_offset))
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/linux-master/drivers/ssb/ |
H A D | pci.c | 170 /* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */ 171 #define SPEX16(_outvar, _offset, _mask, _shift) \ 172 out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift)) 173 #define SPEX32(_outvar, _offset, _mask, _shift) \ 174 out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \ 175 in[SPOFF(_offset)]) & (_mask)) >> (_shift)) 176 #define SPEX(_outvar, _offset, _mask, _shift) \ 177 SPEX16(_outvar, _offset, _mask, _shift) 179 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ 181 SPEX(_field[0], _offset [all...] |