/linux-master/drivers/staging/rtl8723bs/hal/ |
H A D | odm_interface.h | 16 #define _reg_all(_name) ODM_##_name 17 #define _reg_ic(_name, _ic) ODM_##_name##_ic 18 #define _bit_all(_name) BIT_##_name 19 #define _bit_ic(_name, _ic) BIT_##_name##_ic 29 #define _reg_11N(_name) ODM_REG_##_name##_11 [all...] |
/linux-master/include/rdma/ |
H A D | ib_sysfs.h | 21 #define IB_PORT_ATTR_RW(_name) \ 22 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RW(_name) 24 #define IB_PORT_ATTR_ADMIN_RW(_name) \ 25 struct ib_port_attribute ib_port_attr_##_name = \ 26 __ATTR_RW_MODE(_name, 0600) 28 #define IB_PORT_ATTR_RO(_name) \ 29 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RO(_name) 31 #define IB_PORT_ATTR_WO(_name) \ [all...] |
/linux-master/include/linux/ |
H A D | cleanup.h | 61 #define DEFINE_FREE(_name, _type, _free) \ 62 static inline void __free_##_name(void *p) { _type _T = *(_type *)p; _free; } 64 #define __free(_name) __cleanup(__free_##_name) 104 #define DEFINE_CLASS(_name, _type, _exit, _init, _init_args...) \ 105 typedef _type class_##_name##_t; \ 106 static inline void class_##_name##_destructor(_type *p) \ 108 static inline _type class_##_name##_constructor(_init_args) \ 111 #define EXTEND_CLASS(_name, ext, _init, _init_args...) \ 112 typedef class_##_name##_ [all...] |
H A D | hwmon-sysfs.h | 20 #define SENSOR_ATTR(_name, _mode, _show, _store, _index) \ 21 { .dev_attr = __ATTR(_name, _mode, _show, _store), \ 24 #define SENSOR_ATTR_RO(_name, _func, _index) \ 25 SENSOR_ATTR(_name, 0444, _func##_show, NULL, _index) 27 #define SENSOR_ATTR_RW(_name, _func, _index) \ 28 SENSOR_ATTR(_name, 0644, _func##_show, _func##_store, _index) 30 #define SENSOR_ATTR_WO(_name, _func, _index) \ 31 SENSOR_ATTR(_name, 0200, NULL, _func##_store, _index) 33 #define SENSOR_DEVICE_ATTR(_name, _mode, _show, _store, _index) \ 34 struct sensor_device_attribute sensor_dev_attr_##_name \ [all...] |
H A D | sysfs.h | 219 #define __ATTR(_name, _mode, _show, _store) { \ 220 .attr = {.name = __stringify(_name), \ 226 #define __ATTR_PREALLOC(_name, _mode, _show, _store) { \ 227 .attr = {.name = __stringify(_name), \ 233 #define __ATTR_RO(_name) { \ 234 .attr = { .name = __stringify(_name), .mode = 0444 }, \ 235 .show = _name##_show, \ 238 #define __ATTR_RO_MODE(_name, _mode) { \ 239 .attr = { .name = __stringify(_name), \ 241 .show = _name##_sho [all...] |
/linux-master/arch/x86/events/ |
H A D | probe.h | 17 #define __PMU_EVENT_GROUP(_name) \ 18 static struct attribute *attrs_##_name[] = { \ 19 &attr_##_name.attr.attr, \ 23 #define PMU_EVENT_GROUP(_grp, _name) \ 24 __PMU_EVENT_GROUP(_name); \ 25 static struct attribute_group group_##_name = { \ 27 .attrs = attrs_##_name, \
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/linux-master/include/linux/iio/ |
H A D | sysfs.h | 54 #define IIO_ATTR(_name, _mode, _show, _store, _addr) \ 55 { .dev_attr = __ATTR(_name, _mode, _show, _store), \ 58 #define IIO_ATTR_RO(_name, _addr) \ 59 { .dev_attr = __ATTR_RO(_name), \ 62 #define IIO_ATTR_WO(_name, _addr) \ 63 { .dev_attr = __ATTR_WO(_name), \ 66 #define IIO_ATTR_RW(_name, _addr) \ 67 { .dev_attr = __ATTR_RW(_name), \ 70 #define IIO_DEVICE_ATTR(_name, _mode, _show, _store, _addr) \ 71 struct iio_dev_attr iio_dev_attr_##_name \ [all...] |
/linux-master/drivers/platform/x86/dell/ |
H A D | dcdbas.h | 50 #define DCDBAS_DEV_ATTR_RW(_name) \ 51 DEVICE_ATTR(_name,0600,_name##_show,_name##_store); 53 #define DCDBAS_DEV_ATTR_RO(_name) \ 54 DEVICE_ATTR(_name,0400,_name##_show,NULL); 56 #define DCDBAS_DEV_ATTR_WO(_name) \ 57 DEVICE_ATTR(_name,0200,NULL,_name##_stor [all...] |
/linux-master/tools/testing/selftests/powerpc/syscalls/ |
H A D | ipc_unmuxed.c | 18 #define DO_TEST(_name, _num) \ 19 static int test_##_name(void) \ 22 printf("Testing " #_name); \ 36 #define DO_TEST(_name, _num) \ 37 FAIL_IF(test_##_name()); \
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/linux-master/drivers/gpu/drm/amd/pm/inc/ |
H A D | amdgpu_pm.h | 62 #define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...) \ 63 { .dev_attr = __ATTR(_name, _mode, _show, _store), \ 67 #define AMDGPU_DEVICE_ATTR(_name, _mode, _flags, ...) \ 68 __AMDGPU_DEVICE_ATTR(_name, _mode, \ 69 amdgpu_get_##_name, amdgpu_set_##_name, \ 72 #define AMDGPU_DEVICE_ATTR_RW(_name, _flags, ...) \ 73 AMDGPU_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, \ 76 #define AMDGPU_DEVICE_ATTR_RO(_name, _flags, ...) \ 77 __AMDGPU_DEVICE_ATTR(_name, S_IRUG [all...] |
/linux-master/drivers/clk/renesas/ |
H A D | rcar-gen3-cpg.h | 37 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ 38 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset) 40 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ 41 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) 43 #define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ 44 DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \ 48 #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ 50 DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \ 53 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ 54 DEF_BASE(_name, _i [all...] |
H A D | rcar-gen4-cpg.h | 36 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ 37 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SDH, _parent, .offset = _offset) 39 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ 40 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SD, _parent, .offset = _offset) 42 #define DEF_GEN4_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ 43 DEF_BASE(_name, _id, CLK_TYPE_GEN4_MDSEL, \ 47 #define DEF_GEN4_OSC(_name, _id, _parent, _div) \ 48 DEF_BASE(_name, _id, CLK_TYPE_GEN4_OSC, _parent, .div = _div) 50 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ 51 DEF_BASE(_name, _i [all...] |
H A D | renesas-cpg-mssr.h | 44 #define DEF_TYPE(_name, _id, _type...) \ 45 { .name = _name, .id = _id, .type = _type } 46 #define DEF_BASE(_name, _id, _type, _parent...) \ 47 DEF_TYPE(_name, _id, _type, .parent = _parent) 49 #define DEF_INPUT(_name, _id) \ 50 DEF_TYPE(_name, _id, CLK_TYPE_IN) 51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ 52 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult) 53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ 54 DEF_BASE(_name, _i [all...] |
H A D | rzg2l-cpg.h | 129 #define DEF_TYPE(_name, _id, _type...) \ 130 { .name = _name, .id = _id, .type = _type } 131 #define DEF_BASE(_name, _id, _type, _parent...) \ 132 DEF_TYPE(_name, _id, _type, .parent = _parent) 133 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ 134 DEF_TYPE(_name, _id, CLK_TYPE_SAM_PLL, .parent = _parent, .conf = _conf) 135 #define DEF_G3S_PLL(_name, _id, _parent, _conf) \ 136 DEF_TYPE(_name, _id, CLK_TYPE_G3S_PLL, .parent = _parent, .conf = _conf) 137 #define DEF_INPUT(_name, _id) \ 138 DEF_TYPE(_name, _i [all...] |
/linux-master/drivers/regulator/ |
H A D | mc13xxx.h | 55 #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \ 56 [prefix ## _name] = { \ 63 .id = prefix ## _name, \ 67 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ 69 .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\ 70 .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\ 73 #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ 74 [prefix ## _name] = { \ 81 .id = prefix ## _name, \ 85 .enable_bit = prefix ## _reg ## _ ## _name ## E [all...] |
/linux-master/drivers/clk/starfive/ |
H A D | clk-starfive-jh71x0.h | 32 #define JH71X0_GATE(_idx, _name, _flags, _parent) \ 34 .name = _name, \ 40 #define JH71X0__DIV(_idx, _name, _max, _parent) \ 42 .name = _name, \ 48 #define JH71X0_GDIV(_idx, _name, _flags, _max, _parent) \ 50 .name = _name, \ 56 #define JH71X0_FDIV(_idx, _name, _parent) \ 58 .name = _name, \ 64 #define JH71X0__MUX(_idx, _name, _flags, _nparents, ...) \ 66 .name = _name, \ [all...] |
/linux-master/drivers/thermal/qcom/ |
H A D | tsens.h | 88 #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \ 89 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \ 90 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \ 91 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \ 92 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \ 93 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \ 94 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \ 95 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \ 96 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \ 97 [_name## [all...] |
/linux-master/drivers/clk/actions/ |
H A D | owl-fixed-factor.h | 16 #define OWL_FIX_FACT(_struct, _name, _parent, _mul, _div, _flags) \ 20 .hw.init = CLK_HW_INIT(_name, \
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/linux-master/drivers/clk/sprd/ |
H A D | gate.h | 31 #define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ 42 .hw.init = _fn(_name, _parent, \ 47 #define SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \ 50 SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ 54 #define SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \ 56 SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \ 60 #define SPRD_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \ 62 SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \ 66 #define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \ 68 SPRD_SC_GATE_CLK_OPS(_struct, _name, _paren [all...] |
H A D | composite.h | 21 #define SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \ 30 .hw.init = _fn(_name, _parent, \ 35 #define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \ 37 SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \ 41 #define SPRD_COMP_CLK(_struct, _name, _parent, _reg, _mshift, \ 43 SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, NULL, \ 46 #define SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, _table, \ 49 SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \ 54 #define SPRD_COMP_CLK_DATA(_struct, _name, _parent, _reg, _mshift, \ 56 SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _paren [all...] |
H A D | mux.h | 39 #define SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \ 46 .hw.init = _fn(_name, _parents, \ 51 #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \ 53 SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \ 57 #define SPRD_MUX_CLK(_struct, _name, _parents, _reg, \ 59 SPRD_MUX_CLK_TABLE(_struct, _name, _parents, NULL, \ 62 #define SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, _table, \ 64 SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \ 68 #define SPRD_MUX_CLK_DATA(_struct, _name, _parents, _reg, \ 70 SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parent [all...] |
/linux-master/arch/arc/include/asm/ |
H A D | mach_desc.h | 54 #define MACHINE_START(_type, _name) \ 57 .name = _name,
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/linux-master/drivers/clk/sunxi-ng/ |
H A D | ccu_gate.h | 19 #define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags) \ 24 .hw.init = CLK_HW_INIT(_name, \ 31 #define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags) \ 36 .hw.init = CLK_HW_INIT_HW(_name, \ 43 #define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags) \ 48 .hw.init = CLK_HW_INIT_FW_NAME(_name, \ 59 #define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \ 64 .hw.init = CLK_HW_INIT_HWS(_name, \ 71 #define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg, \ 79 .hw.init = CLK_HW_INIT_HWS(_name, \ [all...] |
H A D | ccu_div.h | 87 #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ 96 .hw.init = CLK_HW_INIT(_name, \ 104 #define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ 107 SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ 111 #define SUNXI_CCU_DIV_TABLE_HW(_struct, _name, _parent, _reg, \ 119 .hw.init = CLK_HW_INIT_HW(_name, \ 127 #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ 139 .hw.init = CLK_HW_INIT_PARENTS(_name, \ 146 #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE_CLOSEST(_struct, _name, \ 158 .hw.init = CLK_HW_INIT_PARENTS(_name, \ [all...] |
/linux-master/include/linux/mfd/ |
H A D | core.h | 17 #define MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg, _use_of_reg, _match) \ 19 .name = (_name), \ 31 #define MFD_CELL_OF_REG(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg) \ 32 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg, true, NULL) 34 #define MFD_CELL_OF(_name, _res, _pdata, _pdsize, _id, _compat) \ 35 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, 0, false, NULL) 37 #define MFD_CELL_ACPI(_name, _res, _pdata, _pdsize, _id, _match) \ 38 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, _match) 40 #define MFD_CELL_BASIC(_name, _res, _pdata, _pdsize, _id) \ 41 MFD_CELL_ALL(_name, _re [all...] |