Searched refs:_FPUSW_SHIFT (Results 1 - 4 of 4) sorted by relevance

/haiku/headers/posix/arch/arm/
H A Dfenv.h62 #define _FPUSW_SHIFT 16 macro
63 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
190 __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
192 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
201 __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
203 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
212 return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
/haiku/headers/posix/arch/arm64/
H A Dfenv.h73 #define _FPUSW_SHIFT 8 macro
74 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
219 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
221 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
230 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
232 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
241 return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
/haiku/headers/posix/arch/sparc64/
H A Dfenv.h75 #define _FPUSW_SHIFT 18 macro
76 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
235 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
237 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
246 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
248 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
257 return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
/haiku/headers/posix/arch/ppc/
H A Dfenv.h83 #define _FPUSW_SHIFT 22 macro
85 FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT)
239 __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT;
241 return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT);
252 __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT);
254 return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT);
263 return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT);

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